CN107219957A - A kind of array base palte and display panel - Google Patents
A kind of array base palte and display panel Download PDFInfo
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- CN107219957A CN107219957A CN201710468635.8A CN201710468635A CN107219957A CN 107219957 A CN107219957 A CN 107219957A CN 201710468635 A CN201710468635 A CN 201710468635A CN 107219957 A CN107219957 A CN 107219957A
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- 229910052751 metal Inorganic materials 0.000 claims description 103
- 239000002184 metal Substances 0.000 claims description 103
- 239000000758 substrate Substances 0.000 claims description 63
- 230000000149 penetrating effect Effects 0.000 claims description 6
- 239000004065 semiconductor Substances 0.000 claims description 5
- 229910021654 trace metal Inorganic materials 0.000 claims description 4
- 238000001514 detection method Methods 0.000 description 6
- 230000035945 sensitivity Effects 0.000 description 6
- 239000004973 liquid crystal related substance Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000002349 favourable effect Effects 0.000 description 3
- 239000010409 thin film Substances 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000004984 smart glass Substances 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0412—Digitisers structurally integrated in a display
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0414—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means using force sensing means to determine a position
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
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- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Human Computer Interaction (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Mathematical Physics (AREA)
- Optics & Photonics (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The embodiments of the invention provide a kind of array base palte and display panel, it is related to display technology field.The array base palte includes viewing area and surrounds the non-display area of viewing area；Multiple pressure sensors, multi-stage shift register, the first cabling being connected with multiple pressure sensors, and the second cabling being connected with multi-stage shift register are provided with the non-display area；Wherein, on the direction perpendicular to the array base palte, the projection of first cabling and the projection of second cabling have overlapping region, and are located at different conductive layers in first cabling and second cabling of overlapping region.Technical scheme provided in an embodiment of the present invention can reduce the width of the frame of display panel.
Description
[ technical field ] A method for producing a semiconductor device
The invention relates to the technical field of display, in particular to an array substrate and a display panel.
[ background of the invention ]
Display panels with touch control functions are widely used in various display devices such as mobile phones, tablet computers, and information query machines in halls of public places. The user can operate the display device by touching the mark on the display panel with fingers, so that the dependence of the user on other input equipment (such as a keyboard, a mouse and the like) is eliminated, and the man-machine interaction is simpler.
In order to better satisfy the user requirement, a pressure sensor for detecting the magnitude of touch pressure when a user touches the display panel is usually arranged in the display panel, so that the display panel can not only collect touch position information, but also collect the magnitude of touch pressure, thereby enriching the application range of touch technology.
Among the prior art, pressure sensor sets up in display panel's non-display area, still is provided with multistage shift register in display panel's non-display area, and wherein, shift register corresponds and is provided with many and walks the line, and pressure sensor also corresponds and is provided with many and walks the line, and then makes pressure sensor's setting can increase the space that needs the occupation of walking the line in display panel's non-display area, has increased display panel's frame for be unfavorable for display panel's narrow frame design.
[ summary of the invention ]
Embodiments of the present invention provide an array substrate and a display panel, so as to reduce the width of a frame of the display panel.
In a first aspect, an embodiment of the present invention provides an array substrate, where the array substrate includes a display area and a non-display area surrounding the display area;
a plurality of pressure sensors, a multi-stage shift register, a first wire connected with the pressure sensors and a second wire connected with the multi-stage shift register are arranged in the non-display area; wherein,
in a direction perpendicular to the array substrate, a projection of the first trace and a projection of the second trace have an overlapping region, and the first trace and the second trace in the overlapping region are located on different conductive layers.
Furthermore, the area occupied by the shift register is a shift register area, the area occupied by the pressure sensor is a pressure sensor area, and each pressure sensor area is respectively arranged between two adjacent shift register areas.
Optionally, the first trace includes a first portion disposed in the pressure sensor region and a second portion disposed in the shift register region, and the first portion of the first trace and the second portion of the first trace are disposed on different conductive layers;
the second wire comprises a first portion arranged in the pressure sensor area and a second portion arranged in the shift register area, and the first portion of the second wire and the second portion of the second wire are arranged on different conductive layers.
Furthermore, a first metal layer, a second metal layer and a third metal layer are sequentially arranged on the array substrate, and the first metal layer, the second metal layer and the third metal layer are insulated from each other;
the first part of the first wire is arranged on the second metal layer, the second part of the first wire is arranged on the third metal layer, and the first part of the first wire and the third part of the first wire are electrically connected through a first through hole penetrating through an insulating layer between the second metal layer and the third metal layer;
the first part of the second wire is arranged on the first metal layer, the second part of the second wire is arranged on the second metal layer, and the first part of the second wire and the second part of the second wire are electrically connected through a second through hole penetrating through the insulating layer between the first metal layer and the second metal layer.
Optionally, the first trace includes a first portion disposed in the pressure sensor region and a second portion disposed in the shift register region, and the first portion of the first trace and the second portion of the first trace are disposed on the same conductive layer;
the second wire comprises a first portion arranged in the pressure sensor area and a second portion arranged in the shift register area, and the first portion of the second wire and the second portion of the second wire are arranged on different conductive layers.
Furthermore, a first metal layer, a second metal layer and a third metal layer are sequentially arranged on the array substrate, and the first metal layer, the second metal layer and the third metal layer are insulated from each other;
the first part of the first wire is arranged on the third metal layer, the second part of the first wire is arranged on the third metal layer, and the first part and the second part are directly and electrically connected;
the first part of the second wire is arranged on the first metal layer, the second part of the second wire is arranged on the second metal layer, and the first part and the second part are electrically connected through a third through hole penetrating through the insulating layer between the first metal layer and the second metal layer.
Optionally, the first metal layer is a gate metal layer, the second metal layer is a source/drain metal layer, and the third metal layer is a touch routing metal layer.
Optionally, the plurality of pressure sensors and the plurality of stages of shift registers are disposed on one side of the plurality of second traces, which is close to the display area.
Optionally, at least one pressure sensor is also disposed in a region of the non-display region where the shift register is not disposed.
Optionally, each of said pressure sensors has two inputs and two outputs; the first wires all comprise two input wires and 2n output wires, wherein n is the number of the pressure sensors arranged in the side.
Optionally, each of the pressure sensors includes a first resistor, a second resistor, a third resistor and a fourth resistor, where a second end of the first resistor is electrically connected to a first end of the second resistor, a second end of the second resistor is electrically connected to a first end of the third resistor, a second end of the third resistor is electrically connected to a first end of the fourth resistor, and a second end of the fourth resistor is electrically connected to a first end of the first resistor;
a first input end is arranged between the second end of the first resistor and the first end of the second resistor, a first output end is arranged between the second end of the second resistor and the first end of the third resistor, a second input end is arranged between the second end of the third resistor and the first end of the fourth resistor, and a second output end is arranged between the second end of the fourth resistor and the first end of the first resistor.
Further, the first resistor, the second resistor, the third resistor and the fourth resistor are a whole semiconductor structure.
In a second aspect, an embodiment of the present invention provides a display panel, including the array substrate described in any one of the above.
The embodiment of the invention provides an array substrate and a display panel, wherein the array substrate comprises a display area and a non-display area surrounding the display area, a plurality of pressure sensors, a multi-stage shift register, a first wire connected with the pressure sensors and a second wire connected with the multi-stage shift register are arranged in the non-display area, because the projection of the first wire and the projection of the second wire have an overlapping area in the direction perpendicular to the array substrate, and the first wire and the second wire in the overlapping area are located on different conductive layers, thereby effectively reducing the area occupied by the first wire and the second wire in the non-display area of the array substrate under the condition of ensuring that the first wire and the second wire are not short-circuited, and then can effectively reduce the width of the frame of the display panel, be favorable to the narrow frame design of display panel.
[ description of the drawings ]
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a first top view of an array substrate according to an embodiment of the present invention;
FIG. 2 is an enlarged view illustrating a first region C of FIG. 1 according to an embodiment of the present invention;
fig. 3 is a second top view of the array substrate according to the embodiment of the invention;
fig. 4 is a third top view of the array substrate according to the embodiment of the invention;
FIG. 5 is a schematic cross-sectional view taken along line A-A' of FIG. 2 in accordance with an embodiment of the present invention;
FIG. 6 is a schematic cross-sectional view taken along line B-B' of FIG. 2 in accordance with an embodiment of the present invention;
FIG. 7 is an enlarged schematic view of region C of FIG. 1 according to an embodiment of the present invention;
FIG. 8 is a schematic cross-sectional view taken along line C-C' of FIG. 5 in accordance with an embodiment of the present invention;
fig. 9 is a fourth top view of the array substrate according to the embodiment of the invention;
FIG. 10 is a schematic electrical circuit diagram of a pressure sensor provided by an embodiment of the present invention;
fig. 11 is a schematic diagram of a liquid crystal display panel according to an embodiment of the invention.
[ detailed description ] embodiments
For better understanding of the technical solutions of the present invention, the following detailed descriptions of the embodiments of the present invention are provided with reference to the accompanying drawings.
It should be understood that the described embodiments are only some embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
An embodiment of the invention provides an array substrate, as shown in fig. 1, fig. 1 is a first top view of the array substrate provided in the embodiment of the invention, and the array substrate includes a display area a and a non-display area B surrounding the display area a; a plurality of pressure sensors 1, a plurality of stages of shift registers 2, first wirings (not shown in fig. 1) connected to the plurality of pressure sensors 1, and second wirings (not shown in fig. 1) connected to the plurality of stages of shift registers 2 are disposed in the non-display region B; as shown in fig. 2, fig. 2 is an enlarged schematic view of a first region C of fig. 1 provided in the embodiment of the present invention, in a direction perpendicular to the array substrate, a projection of the first trace 3 and a projection of the second trace 4 have an overlapping region, and the first trace 3 and the second trace 4 in the overlapping region are located on different conductive layers. For example, when the array substrate is applied to a smart phone, the detection of the pressure applied to each position of the display panel of the smart phone can be realized only by respectively arranging 3 to 4 pressure sensors 1 in the non-display areas B on the left and right sides of the display area a.
For the area where the projection of the first trace 3 and the projection of the second trace 4 do not overlap in the direction perpendicular to the array substrate, the first trace 3 and the second trace 4 may be located on the same conductive layer or located on different conductive layers, which is not limited herein. Of course, the different conductive layers on the array substrate must be insulated from each other. The different conductive layers may be two conductive layers or a plurality of conductive layers, and the different conductive layers are specifically what kind of film layers on the array substrate, which is not limited herein, and the embodiments of the present invention will be illustrated in the following contents.
Because in the direction perpendicular to array substrate, the projection of first line 3 and the projection of second line 4 have the overlap region, and first line 3 and second line 4 of overlapping region are located different conducting layers, thereby make under the condition of guaranteeing not short circuit between first line 3 and second line 4, effectively reduced the area that first line 3 and second line 4 occupy in the non-display area B of array substrate, and then can effectively reduce the width of display panel's frame, be favorable to display panel's narrow frame design.
As shown in fig. 1, 3 and 4, fig. 3 is a second top view of the array substrate provided by the embodiment of the invention, fig. 4 is a third top view of the array substrate provided by the embodiment of the invention, and in a non-display area B of the array substrate, an area occupied by the pressure sensor 1 is a pressure sensor area B1The area occupied by the shift register 2 is a shift register area B2Pressure sensor area B in non-display area B1And a shift register region B2The relative positional relationship of (a) may be various:
first, as shown in FIG. 3, a pressure sensor area B1Located in shift register region B2That is, the plurality of pressure sensors 1 are disposed on the side of the multi-stage shift register 2 away from the display area a, in this case, not only are the plurality of pressure sensors 1 farther from the display area a and have poor sensitivity for detecting pressure in the display area a, but also the non-display area is causedThe width of B is larger, so that the frame of the display panel is wider.
Second, as shown in FIG. 4, a pressure sensor area B1Located in shift register region B2The side close to the display area a, that is, the plurality of pressure sensors 1 are disposed on the side of the multi-stage shift register 2 close to the display area a, at this time, the plurality of pressure sensors 1 are closer to the display area a, the sensitivity of pressure detection in the display area a is better, but the width of the non-display area B is larger, and the frame of the display panel is wider.
Thirdly, as shown in FIG. 1, each pressure sensor area B1Are respectively arranged in two adjacent shift register regions B2In other words, each pressure sensor 1 is respectively disposed between two adjacent stages of shift registers 2, at this time, not only the plurality of pressure sensors 1 are closer to the display area a and have better sensitivity to pressure detection in the display area a, but also the width of the non-display area B is smaller, which is beneficial to reducing the width of the frame of the display panel. It should be noted that, as described above, it is not limited that one pressure sensor 1 is disposed between any two adjacent shift registers 2, and the number of the pressure sensors 1 is usually much smaller than that of the shift registers 2, and it is only necessary to uniformly distribute the pressure sensors 1 between the two adjacent shift registers 2 at corresponding positions.
The following embodiments of the present invention describe the above different conductive layers as two conductive layers or a plurality of conductive layers by way of example.
As shown in fig. 2, the first trace 3 is disposed in the pressure sensor region B1And a first portion 3a provided in the shift register region B2The second trace 4 is disposed in the pressure sensor region B1And a first portion 4a provided in the shift register region B2Wherein the first portion 3a of the first trace 3 and the second portion 3b of the first trace 3 may be located on the same conductive layer or on different conductive layers, and the first portion 4a of the second trace 4 and the second portion 4b of the second trace 4 may be located on the same conductive layer or on different conductive layersThe same conductive layer may also be located on a different conductive layer.
In one example, as shown in fig. 2, the first portion 3a of the first trace 3 and the second portion 3b of the first trace 3 are disposed on different conductive layers, where the different conductive layers may be two conductive layers or a plurality of conductive layers; the first portion 4a of the second trace 4 and the second portion 4b of the second trace 4 are disposed on different conductive layers, where the different conductive layers may be two conductive layers or a plurality of conductive layers. The conductive layers of the first portion 3a of the first trace 3 and the second portion 3b of the first trace 3 and the conductive layers of the first portion 4a of the second trace 4 and the second portion 4b of the second trace 4 may have the same conductive layer or may be different conductive layers.
Alternatively, as shown in fig. 2, 5 and 6, fig. 5 is a schematic cross-sectional view of fig. 2 along a direction a-a 'provided in an embodiment of the present invention, fig. 6 is a schematic cross-sectional view of fig. 2 along a direction B-B' provided in an embodiment of the present invention, a first metal layer 10, a second metal layer 20 and a third metal layer 30 are sequentially disposed on an array substrate, and the first metal layer 10, the second metal layer 20 and the third metal layer 30 are insulated from each other; the first portion 3a of the first trace 3 is disposed on the second metal layer 20, the second portion 3b of the first trace 3 is disposed on the third metal layer 30, and the first portion and the second portion pass through a first via V passing through an insulating layer disposed between the second metal layer 20 and the third metal layer 301Electrically connecting; the first portion 4a of the second trace 4 is disposed on the first metal layer 10, the second portion 4b of the second trace 4 is disposed on the second metal layer 20, and the first portion and the second portion pass through a second via V passing through the insulating layer between the first metal layer 10 and the second metal layer 202And (6) electrically connecting.
In addition, if the pressure sensor is located in the pressure sensor region B1If the first portion 3a of the first trace 3 is overlapped, the pressure sensor area B should be located on the premise that the first trace 3 and the second trace 4 in the overlapping area of the first trace 3 and the second trace 4 are located on different conductive layers1Respectively arranged on different conductive layers of the first portion 3a of each of the overlapping first traces 3, e.g. as shown in fig. 2, and located at the same time as the pressure sensorRegion B1One first portion 3a 'of the first trace 3 is overlapped with the other first portion 3a ″ thereof, such that the one first portion 3 a' of the first trace 3 is disposed on the third metal layer 30 and the other first portion 3a ″ is still disposed on the second metal layer 20.
In another example, as shown in fig. 7, fig. 7 is an enlarged schematic view of a second area C of fig. 1 provided in the embodiment of the present invention, wherein the first portion 3a of the first trace 3 and the second portion 3b of the first trace 3 are disposed on the same conductive layer; the first portion 4a of the second trace 4 and the second portion 4b of the second trace 4 are disposed on different conductive layers, where the different conductive layers may be two conductive layers or a plurality of conductive layers. The conductive layers of the first portion 3a of the first trace 3 and the second portion 3b of the first trace 3 and the conductive layers of the first portion 4a of the second trace 4 and the second portion 4b of the second trace 4 may have the same conductive layer or may be different conductive layers.
Alternatively, as shown in fig. 7 and 8, fig. 8 is a schematic cross-sectional view along the direction C-C' of fig. 5 according to an embodiment of the present invention, a first metal layer 10, a second metal layer 20, and a third metal layer 30 are sequentially disposed on the array substrate, and the first metal layer 10, the second metal layer 20, and the third metal layer 30 are insulated from each other; the first portion 3a of the first trace 3 is disposed on the third metal layer 30, and the second portion 3b of the first trace 3 is also disposed on the third metal layer 30, which are directly electrically connected, that is, when the third metal layer 30 is patterned to form the first portion 3a of the first trace 3 and the second portion 3b of the first trace 3, the first portion 3a of the first trace 3 and the second portion 3b of the first trace 3 are integrated, so that the two portions are directly electrically connected; the first portion 4a of the second trace 4 is disposed on the first metal layer 10, the second portion 4b of the second trace 4 is disposed on the second metal layer 20, and the first portion and the second portion pass through a third via V passing through the insulating layer between the first metal layer 10 and the second metal layer 203And (6) electrically connecting.
In addition, if the pressure sensor is located in the pressure sensor region B1Should overlap occur between the first portions 3a of the first traces 3, it should be ensured that the overlapping area of the first traces 3 and the second traces 4 is formedThe first wire 3 and the second wire 4 of the area are positioned on the premise of different conductive layers, and the area B of the pressure sensor is positioned1Respectively arranged on different conductive layers, e.g. as shown in fig. 7, of the first portions 3a of the overlapping first traces 3, which are located in the pressure sensor area B1One first portion 3a 'of the first trace 3 is overlapped with the other first portion 3a ″ thereof, such that the one first portion 3 a' of the first trace 3 is disposed on the second metal layer 20 and the other first portion 3a ″ is still disposed on the third metal layer 30.
Exemplarily, the array substrate in the embodiment of the present invention includes a substrate, and a gate metal layer, a first insulating layer, an active layer, a source drain metal layer, a second insulating layer, a touch trace metal layer, a third insulating layer, a common electrode layer, a fourth insulating layer, and a pixel electrode layer sequentially disposed on the substrate, where the gate metal layer is provided with a gate line and a gate electrode of a thin film transistor, the source drain metal layer is provided with a data line, a source electrode and a drain electrode of the thin film transistor, the common electrode layer is provided with a plurality of common electrode blocks, the touch trace metal layer is provided with a plurality of touch traces for electrically connecting with the common electrode blocks to provide touch signals for the common electrode blocks, the pixel electrode layer is provided with a plurality of pixel electrodes, and each pixel electrode is provided with a slit. Based on the array substrate with the structure, optionally, the first metal layer 10 is a gate metal layer, the second metal layer 20 is a source/drain metal layer, and the third metal layer 30 is a touch trace metal layer.
In addition, optionally, as shown in fig. 2, in the embodiment of the present invention, the plurality of pressure sensors 1 and the plurality of shift registers 2 are disposed on one side of the plurality of second traces 4 close to the display area a, so that not only the sensitivity of the pressure sensors 1 to pressure detection in the display area a is high, but also the trace distance between the plurality of shift registers 2 and the corresponding gate line is short, the connection resistance between the two is small, and the signal loss is small.
Alternatively, as shown in fig. 9, fig. 9 is a top view of the array substrate according to the fourth embodiment of the present invention, and at least one pressure sensor 1 is also disposed in a region (for example, a non-display region on the upper side and/or the lower side of the display region when the display device is normally placed) of the non-display region B where the shift register 2 is not disposed, so that the number of pressure sensors 1 in the non-display region B is large, and the sensitivity of pressure detection in the display region a is high. It should be noted that, as shown in fig. 9, when the display device is normally placed, the pressure sensor 1 is disposed in the non-display area B on the upper side of the display area a, and the driving circuit IC is disposed in the non-display area B on the lower side, the first trace 3 corresponding to the pressure sensor 1 disposed in the non-display area B on the upper side of the display area a needs to pass through the non-display area B on the left side and/or the right side of the display area a to be connected to the driving circuit IC disposed in the non-display area B on the lower side of the display area a, so that the first trace 3 corresponding to the pressure sensor 1 disposed in the non-display area B on the upper side of the display area a needs to be taken into consideration when the first trace 3 and the second trace 4 in the non-display area B on the left side and/or the right side of the.
The structure of the pressure sensor 1 in the prior art can be various, and can be applied to the embodiment of the present invention, for example, as shown in fig. 10, fig. 10 is a circuit schematic diagram of the pressure sensor provided by the embodiment of the present invention, and each pressure sensor 1 has two input terminals I1And I2And two output terminals O1And O2(ii) a Correspondingly, when only the pressure sensors 1 are disposed in the non-display region B of the display device on the left side and/or the right side of the display region a as shown in fig. 1, each of the first wires 3 includes two input lines and 2n output lines, where n is the number of the pressure sensors 1 disposed in the side (left side or right side), and at this time, all the pressure sensors 1 disposed in the side share two input lines, so that the number of the first wires 3 in the side is minimized, the area occupied by the first wires 3 is minimized, and the reduction of the width of the frame of the display panel is facilitated.
Alternatively, as shown in fig. 10, each pressure sensor 1 includes a first resistance R1A second resistor R2A third resistor R3And a fourth resistor R4Wherein the first resistor R1Second terminal and second resistor R2Is electrically connected to the first terminal of the second resistor R2Second terminal and third resistor R3Is electrically connected to the first terminal of the third resistor R3Second terminal and fourth resistor R4Is electrically connected to the first terminal of the fourth resistor R4Second terminal and first resistor R1Is electrically connected with the first end of the first terminal; a first resistor R1Second terminal and second resistor R2Is provided with a first input end I between the first ends1A second resistance R2Second terminal and third resistor R3Is provided with a first output end O between the first ends1Third resistor R3Second terminal and fourth resistor R4Between the first ends is provided with a second input end I2Fourth resistor R4Second terminal and first resistor R1Is provided with a second output end O between the first ends2。
The principle of the pressure sensor 1 having the above-described structure detecting the pressure in the display area a is as follows:
as shown in fig. 10, the first resistor R1A second resistor R2A third resistor R3And a fourth resistor R4Forming a Wheatstone bridge, a first resistor R1A second resistor R2A third resistor R3And a fourth resistor R4Four arms called a wheatstone bridge; when at the first input terminal I1And a second input terminal I2When a power supply is connected between the first resistor and the second resistor, all branches in the Wheatstone bridge have current passing through the Wheatstone bridge when the first resistor R1A second resistor R2A third resistor R3And a fourth resistor R4Resistance value of (1) satisfies R2/R3＝R1/R4While, the first output terminal O1And a second output terminal O2The potential between the two is equal, if a galvanometer is connected between the two, the current passing through the galvanometer is zero at the moment, a pointer of the galvanometer indicates zero scale, the Wheatstone bridge is in a balanced state, wherein R2/R3＝R1/R4A Wheatstone bridge equilibrium condition; when in useWhen the pressure sensor 1 detects the pressure applied in the display area a, the display panel is deformed under the action of the pressure, so that the first resistor R1A second resistor R2A third resistor R3And a fourth resistor R4Does not satisfy the balance condition of the Wheatstone bridge, thereby enabling the first output end O to be changed1And a second output terminal O2If a galvanometer is connected between the two, the current passing through the galvanometer is not zero at the moment, a pointer of the galvanometer deflects to output a corresponding signal value, and the magnitude of the pressure applied to the display area A can be obtained through the magnitude of the signal value.
Optionally, the first resistor R1A second resistor R2A third resistor R3And a fourth resistor R4There may be 4 independent resistors; or, the first resistor R1A second resistor R2A third resistor R3And a fourth resistor R4The inventors of the present application have found that the first resistor R is a monolithic semiconductor structure1A second resistor R2A third resistor R3And a fourth resistor R4The pressure sensor 1 has a high sensitivity to pressure detection in the display area a when it is a one-piece semiconductor structure.
In addition, an embodiment of the present invention provides a display panel, including the array substrate described in any one of the above. Exemplarily, the display panel is a liquid crystal display panel, as shown in fig. 11, fig. 11 is a schematic diagram of a liquid crystal display panel provided in an embodiment of the present invention, and the liquid crystal display panel includes the array substrate 100 described above, a color filter substrate 200 disposed opposite to the array substrate 100, and a liquid crystal layer 300 located between the array substrate 100 and the color filter substrate 200. The display panel can be applied to any display device or component with a display function, such as a smart phone, a wearable smart watch, smart glasses, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, an on-vehicle display, an electronic book, and the like.
The embodiment of the invention provides an array substrate and a display panel, wherein the array substrate comprises a display area and a non-display area surrounding the display area, a plurality of pressure sensors, a multi-stage shift register, a first wire connected with the pressure sensors and a second wire connected with the multi-stage shift register are arranged in the non-display area, because the projection of the first wire and the projection of the second wire have an overlapping area in the direction perpendicular to the array substrate, and the first wire and the second wire in the overlapping area are located on different conductive layers, thereby effectively reducing the area occupied by the first wire and the second wire in the non-display area of the array substrate under the condition of ensuring that the first wire and the second wire are not short-circuited, and then can effectively reduce the width of the frame of the display panel, be favorable to the narrow frame design of display panel.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (13)
1. An array substrate is characterized in that,
a non-display area including a display area and a surrounding display area;
a plurality of pressure sensors, a multi-stage shift register, a first wire connected with the pressure sensors and a second wire connected with the multi-stage shift register are arranged in the non-display area; wherein,
in a direction perpendicular to the array substrate, a projection of the first trace and a projection of the second trace have an overlapping region, and the first trace and the second trace in the overlapping region are located on different conductive layers.
2. The array substrate of claim 1, wherein the area occupied by the shift register is a shift register area, the area occupied by the pressure sensors is a pressure sensor area, and each pressure sensor area is respectively disposed between two adjacent shift register areas.
3. The array substrate of claim 2,
the first routing wire comprises a first part arranged in the pressure sensor area and a second part arranged in the shift register area, and the first part of the first routing wire and the second part of the first routing wire are arranged on different conductive layers;
the second wire comprises a first portion arranged in the pressure sensor area and a second portion arranged in the shift register area, and the first portion of the second wire and the second portion of the second wire are arranged on different conductive layers.
4. The array substrate of claim 3, wherein a first metal layer, a second metal layer and a third metal layer are sequentially disposed on the array substrate, and the first metal layer, the second metal layer and the third metal layer are insulated from each other;
the first part of the first wire is arranged on the second metal layer, the second part of the first wire is arranged on the third metal layer, and the first part of the first wire and the third part of the first wire are electrically connected through a first through hole penetrating through an insulating layer between the second metal layer and the third metal layer;
the first part of the second wire is arranged on the first metal layer, the second part of the second wire is arranged on the second metal layer, and the first part of the second wire and the second part of the second wire are electrically connected through a second through hole penetrating through the insulating layer between the first metal layer and the second metal layer.
5. The array substrate of claim 2,
the first routing wire comprises a first part arranged in the pressure sensor area and a second part arranged in the shift register area, and the first part of the first routing wire and the second part of the first routing wire are arranged on the same conductive layer;
the second wire comprises a first portion arranged in the pressure sensor area and a second portion arranged in the shift register area, and the first portion of the second wire and the second portion of the second wire are arranged on different conductive layers.
6. The array substrate of claim 5, wherein a first metal layer, a second metal layer and a third metal layer are sequentially disposed on the array substrate, and the first metal layer, the second metal layer and the third metal layer are insulated from each other;
the first part of the first wire is arranged on the third metal layer, the second part of the first wire is arranged on the third metal layer, and the first part and the second part are directly and electrically connected;
the first part of the second wire is arranged on the first metal layer, the second part of the second wire is arranged on the second metal layer, and the first part and the second part are electrically connected through a third through hole penetrating through the insulating layer between the first metal layer and the second metal layer.
7. The array substrate of claim 4 or 6, wherein the first metal layer is a gate metal layer, the second metal layer is a source/drain metal layer, and the third metal layer is a touch trace metal layer.
8. The array substrate of claim 1, wherein the plurality of pressure sensors and the plurality of stages of shift registers are disposed on a side of the plurality of second traces that is close to the display area.
9. The array substrate of claim 1, wherein at least one of the pressure sensors is disposed in a region of the non-display region where the shift register is not disposed.
10. The array substrate of claim 1, wherein each of the pressure sensors has two inputs and two outputs; the first wires all comprise two input wires and 2n output wires, wherein n is the number of the pressure sensors arranged in the side.
11. The array substrate of claim 10, wherein each of the pressure sensors comprises a first resistor, a second resistor, a third resistor and a fourth resistor, wherein a second end of the first resistor is electrically connected to a first end of the second resistor, a second end of the second resistor is electrically connected to a first end of the third resistor, a second end of the third resistor is electrically connected to a first end of the fourth resistor, and a second end of the fourth resistor is electrically connected to a first end of the first resistor;
the second end of first resistance with be provided with first input between the first end of second resistance, the second end of second resistance with be provided with first output between the first end of third resistance, the second end of third resistance with be provided with the second input between the first end of fourth resistance, the second end of fourth resistance with be provided with the second output between the first end of first resistance.
12. The array substrate of claim 11, wherein the first resistor, the second resistor, the third resistor and the fourth resistor are a monolithic semiconductor structure.
13. A display panel comprising the array substrate according to any one of claims 1 to 12.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710468635.8A CN107219957B (en) | 2017-06-20 | 2017-06-20 | Array substrate and display panel |
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