CN106489196B - Semiconductor device - Google Patents

Semiconductor device Download PDF

Info

Publication number
CN106489196B
CN106489196B CN201480080464.6A CN201480080464A CN106489196B CN 106489196 B CN106489196 B CN 106489196B CN 201480080464 A CN201480080464 A CN 201480080464A CN 106489196 B CN106489196 B CN 106489196B
Authority
CN
China
Prior art keywords
heat sink
hole
resin
semiconductor device
insulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201480080464.6A
Other languages
Chinese (zh)
Other versions
CN106489196A (en
Inventor
秦佑贵
荒木慎太郎
白泽敬昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of CN106489196A publication Critical patent/CN106489196A/en
Application granted granted Critical
Publication of CN106489196B publication Critical patent/CN106489196B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3737Organic materials with or without a thermoconductive filler
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334Auxiliary members in encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/40Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
    • H01L23/4006Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
    • H01L2023/4037Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws characterised by thermal path or place of attachment of heatsink
    • H01L2023/4062Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws characterised by thermal path or place of attachment of heatsink heatsink to or through board or cabinet
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/40Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
    • H01L23/4006Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws
    • H01L2023/4037Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs with bolts or screws characterised by thermal path or place of attachment of heatsink
    • H01L2023/4068Heatconductors between device and heatsink, e.g. compliant heat-spreaders, heat-conducting bands
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001Core members of the connector
    • H01L2224/37099Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/3754Coating
    • H01L2224/37599Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/40137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73221Strap and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Dispersion Chemistry (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

Semiconductor device of the present invention is characterized in that, include semiconductor module, it is with semiconductor element, heat sink and resin, the heat sink is connect with the semiconductor element, it is formed with heat sink through-hole in the heat sink, which is covered the semiconductor element and the heat sink in a manner of the lower surface for exposing the heat sink;Cooler;1st insulation rouge, is set between the lower surface of the heat sink and the cooler, the heat sink and the cooler is thermally connected;And the 2nd insulation rouge, by with the 1st insulation rouge connect in a manner of be set to the heat sink through-hole.

Description

Semiconductor device
Technical field
The present invention relates to a kind of semiconductor devices for for example handling high current.
Background technique
In patent document 1, the semiconductor device that semiconductor module is fixed on to cooler is disclosed.
Patent document 1: Japanese Unexamined Patent Publication 2010-192717 bulletin
Summary of the invention
In order to ensure the thermal diffusivity of semiconductor module, the setting insulation rouge preferably between semiconductor module and cooler.But It is, since semiconductor module is different from the linear expansion coefficient of cooler, in semiconductor module in use, semiconductor module It is changed over time with the interval of cooler.As a result, it some times happens that insulation rouge between semiconductor module and cooler abjection to Extraction phenomenon that is external and entering air between semiconductor module and cooler.There are following problems, that is, if in semiconductor Enter air between module and cooler, is then unable to maintain that the thermal diffusivity of semiconductor module.
The present invention proposes that its purpose is to provide one kind can be to semiconductor module in order to solve the problem above-mentioned The semiconductor device that the reduction of the thermal diffusivity of block is inhibited.
The semiconductor device that present invention is related to is characterized in that, comprising: semiconductor module, with semiconductor element Part, heat sink and resin, the heat sink are connect with the semiconductor element, are formed with heat sink through-hole in the heat sink, the tree Rouge is covered the semiconductor element and the heat sink in a manner of the lower surface for exposing the heat sink;Cooler;1st insulation rouge, Between its lower surface for being set to the heat sink and the cooler, the heat sink and the cooler are thermally connected;And the 2nd insulation Rouge is set to the heat sink through-hole in a manner of connecting with the 1st insulation rouge.
Another semiconductor device that present invention is related to is characterized in that, comprising: semiconductor module has half Conductor element, heat sink and resin, the heat sink are connect with the semiconductor element, and the resin is to expose the following table of the heat sink The mode in face covers the semiconductor element and the heat sink;Cooler;Seal member will include the heat sink and the cooling The regional seal in the region between device and create sealing area;And insulation rouge, which is filled up.
Other features of the invention are defined below.
The effect of invention
In accordance with the invention it is possible to be entered between semiconductor module and cooler in air in the use of semiconductor device This case is inhibited, therefore can be inhibited to the reduction of the thermal diffusivity of semiconductor module.
Detailed description of the invention
Fig. 1 is the cross-sectional view for the semiconductor device that embodiment 1 is related to.
Fig. 2 is the top view of semiconductor device.
The cross-sectional view of semiconductor device when Fig. 3 is the injection of the 2nd insulation rouge.
Fig. 4 is the figure of the insulation rouge after indicating diffusion.
Fig. 5 is the top view for the semiconductor device that embodiment 2 is related to.
Fig. 6 is the cross-sectional view for the semiconductor device that embodiment 3 is related to.
Fig. 7 is the top view of semiconductor device.
Fig. 8 is the cross-sectional view for the semiconductor device that embodiment 4 is related to.
Fig. 9 is the cross-sectional view for the semiconductor device that embodiment 5 is related to.
Figure 10 is the cross-sectional view for the semiconductor device that embodiment 6 is related to.
Figure 11 is the cross-sectional view for the semiconductor device that embodiment 7 is related to.
Figure 12 is the cross-sectional view for the semiconductor device that embodiment 8 is related to.
Figure 13 is the cross-sectional view for the semiconductor device that embodiment 9 is related to.
Figure 14 is the bottom view of the 2nd check-valves etc..
Figure 15 is the figure for indicating the variation of the 2nd check-valves.
Figure 16 is the cross-sectional view for the semiconductor device that embodiment 10 is related to.
Figure 17 is the top view of semiconductor device.
Figure 18 is the cross-sectional view for the semiconductor device that variation is related to.
Specific embodiment
Referring to attached drawing, the semiconductor device that embodiments of the present invention are related to is illustrated.To identical or corresponding knot Structure element marks identical label, omits repeated explanation sometimes.
Embodiment 1.
Fig. 1 is the cross-sectional view for the semiconductor device that embodiments of the present invention 1 are related to.Semiconductor device 10 has with for example Cu or Al is the heat sink 12 of principal component.Semiconductor element 16 is connected with by solder 14 in heat sink 12.Semiconductor element Part 16 is to form anode in upper surface, form the diode of cathode in lower surface.Connected in heat sink 12 by solder 22 It is connected to semiconductor element 24.Semiconductor element 24 is to form emitter and grid in upper surface, form current collection in lower surface The IGBT of pole.
Main terminal 20 is connected with via solder 18 in the upper surface of semiconductor element 16.The main terminal 20 is via solder 26 And it is connect with the emitter of semiconductor element 24.Control terminal is connected with via conducting wire 28 in the grid of semiconductor element 24 30。
Semiconductor element 16,24, heat sink 12 etc. are covered in a manner of exposing the lower surface of heat sink 12 by resin 39.Tree Rouge 39 is such as epoxy resin.Main terminal 20 and control terminal 30 extend out to outside from the side of resin 39.By semiconductor element 16,24, heat sink 12, main terminal 20, control terminal 30 and resin 39 constitute 1 semiconductor module.
Through-thickness is formed with by the perforative heat sink through-hole 12a of heat sink 12 in heat sink 12.It is arranged in resin 39 There is the resin through-hole 39a connecting with heat sink through-hole 12a.Main terminal 20 is provided with main side sub-through hole 20a.This 3 hole wholes Along semiconductor module thickness direction and be arranged.By forming heat sink through-hole 12a, resin through-hole 39a and main side sub-through hole 20a, to be formed the perforative semiconductor module through-hole of semiconductor module.
Insulating trip 40 is pasted in the lower surface of heat sink 12.Insulating trip 40 has the 1st film 42 and the 2nd film 44.About exhausted The material of embolium 40, the material by having both electrical insulating property and thermal diffusivity are formed, are not particularly limited, for example, ceramic Material.The insulating trip through-hole 40a connecting with heat sink through-hole 12a is formed in insulating trip 40.
Semiconductor device 10 has the cooler 50 for cooling down semiconductor module.Lower surface and cooling in heat sink 12 The 1st insulation rouge 52 is provided between device 50.This concept is logical comprising insulating trip between the lower surface and cooler 50 of heat sink 12 Hole 40a.Heat sink 12 and cooler 50 are thermally connected by the 1st insulation rouge 52.1st insulation rouge 52 is by having both electrical insulating property and heat dissipation Property material formed.In heat sink through-hole 12a, the 2nd insulation rouge 54 is provided in a manner of connecting with the 1st insulation rouge 52.2nd Insulation rouge 54 and the 1st insulation rouge 52 are preferably formed by identical material.
Fig. 2 is the top view of semiconductor device 10, and the inside of resin 39 has been shown for illustration in Fig. 2.It is main Terminal through-hole 20a is formed in the center of semiconductor device.Heat sink 12 is connect by solder 60 with main terminal 62.In addition, dissipating Hot plate 12 is connect by solder 64 with main terminal 66.Main terminal 62,66 extend out to the outside of resin 39.
The manufacturing method of semiconductor device 10 is illustrated.Firstly, being located at heat sink through-hole with main side sub-through hole 20a The mode of the surface of 12a welds main terminal 20 etc., assembles to semiconductor module.It is formed by molded Resin 39 with resin through-hole 39a completes semiconductor module.
Next, in such a way that heat sink through-hole 12a is Chong Die with insulating trip through-hole 40a, in the heat sink of semiconductor module Paste insulating trip 40 in 12 lower surface.Next, the 1st insulation rouge 52 of setting on cooler 50.Then, in the 1st insulation On rouge 52, insulating trip 40 is contacted, heat sink 12 and cooler 50 are thermally connected.
Next, being packed into the 2nd insulation rouge 54 to heat sink through-hole 12a.Partly leading when Fig. 3 is the injection of the 2nd insulation rouge The cross-sectional view of body device.The 2nd insulation rouge 54 is set to flow into resin through-hole 39a above semiconductor module.2nd insulation as a result, Rouge 54 is in contact with the 1st insulation rouge 52.In this way, semiconductor device 10 shown in FIG. 1 is completed.Not only exist in addition, being shown in Fig. 1 Heat sink through-hole 12a and the state that a small amount of insulation rouge is also equipped in resin through-hole 39a.
If expansion and contraction is repeated in semiconductor device with the energization of semiconductor module, then the 1st insulation rouge 52 to The peripheral direction of 1st insulation rouge 52 is diffused.Insulation rouge 70 after Fig. 4 shows diffusion.If the 1st insulation rouge 52 is outside Circumferential direction is diffused, it is likely that can enter air at the position for insulating rouge 52 there are the 1st originally so far, semiconductor module The thermal diffusivity of block reduces.However, the semiconductor device 10 that embodiment according to the present invention 1 is related to, as shown in figure 4, the 2nd insulation Rouge 54 supplements the diffusing capacity of the 1st insulation rouge 52.Thus, it is possible to prevent the script between heat sink 12 and cooler 50 There are the positions of the 1st insulation rouge 52 space occurs, therefore can inhibit to the reduction of the thermal diffusivity of semiconductor module.
Semiconductor device 10 can be in the premise for the 2nd insulation rouge that there is the diffusing capacity to the 1st insulation rouge 52 to be supplemented It is lower suitably to be deformed.For example, it is also possible to by resin through-hole 39a and main side sub-through hole 20a omission and only in heat sink through-hole 12a Setting insulation rouge (the 2nd insulation rouge).In this case, the 2nd insulation rouge is packed into heat sink by semiconductor module reversion After through-hole 12a, semiconductor module is installed on cooler 50.
Can also heat sink through-hole 12a is set in heat sink 12, but recess portion is set in heat sink 12, it is recessed at this The 2nd insulation rouge of portion's setting.However, the width of the preferably recess portion is as small as possible, in width in order to ensure the rigidity of semiconductor module The 2nd insulation rouge of sufficient amount can not be accommodated by spending small recess portion.In order to ensure the 2nd insulation rouge of sufficient amount, it is preferably formed as heat sink Through-hole 12a rather than recess portion.
Main terminal 20 can also be set in a manner of the surface to avoid heat sink through-hole 12a, thus omitting master Semiconductor module through-hole is set while terminal through-hole 20a.Also it can be omitted insulating trip 40.In addition, semiconductor module and cooling Device 50 can also be screwed etc. and be fixed.Semiconductor module and cooler 50 are being subjected to the fixed feelings of screw It can also happen that extracting phenomenon out under condition, therefore the present invention is effective.
These deformations can also be suitably applied to the semiconductor device that following embodiment is related to.Following embodiment The common point of the semiconductor device and embodiment 1 that are related to is more, therefore is said centered on the difference of embodiment 1 It is bright.
Embodiment 2.
Fig. 5 is the top view for the semiconductor device that embodiments of the present invention 2 are related to.It is provided with multiple resin through-hole 39b. The semiconductor device has multiple fan-shaped semiconductor module through-holes in plan view.In order to maintain semiconductor module Semiconductor module through-hole is formed while rigid, it is effective that multiple semiconductor module through-holes are arranged as embodiment 2.This Outside, the flat shape of semiconductor module through-hole is not limited to fan-shaped or round.
Embodiment 3.
Fig. 6 is the cross-sectional view for the semiconductor device that embodiments of the present invention 3 are related to.It is provided with multiple heat sink through-holes 12a, resin through-hole 39a and main side sub-through hole 20a.Also set up it is multiple 2 insulation rouge 54, by multiple heat sink through-hole 12a it In fill up.Fig. 7 is the top view of the semiconductor device of embodiment 3.Semiconductor module through-hole is not only arranged at semiconductor module Central portion, be also provided at peripheral part.The semiconductor module through-hole of peripheral part is in main terminal 20,60,66 and control terminal What the mode of sub 30 not set through-holes was formed.By the central portion that semiconductor module through-hole is dispersedly set to semiconductor module And peripheral part, so as to promptly be supplemented the diffusing capacity of the 1st insulation rouge 52 using the 2nd insulation rouge 54.
Embodiment 4.
Fig. 8 is the cross-sectional view for the semiconductor device that embodiments of the present invention 4 are related to.Resin 39 is resin through-hole 39a's At least part is formed with the width wide width part 39c bigger than the width of heat sink through-hole 12a.Heat sink through-hole is shown in Fig. 8 The width of 12a is x1, the width of wide width part 39c is the x2 bigger than x1.
The 3rd insulation rouge 80 being in contact with the 2nd insulation rouge 54 is provided in resin through-hole 39a.One of 3rd insulation rouge 80 Set up a part i.e. wide width part 39c for being placed in resin through-hole 39a separately.Wide width part 39c is bigger than heat sink through-hole 12a width, therefore energy The enough a large amount of insulation rouge of receiving.Thus, even if the diffusing capacity of the 1st insulation rouge 52 is big, it can also supplement the insulation rouge of sufficient amount.And And due to enabling to heat sink through-hole 12a to maintain small width, it is able to maintain that the rigidity of semiconductor module.
It can also be not setting resin through-hole 39a, but recess portion is set in resin 39, in the 3rd insulation of recess portion setting Rouge.In such a situation it is preferred that keeping the width of recess portion bigger than the width of heat sink through-hole 12a.
Embodiment 5.
Fig. 9 is the cross-sectional view for the semiconductor device that embodiments of the present invention 5 are related to.The semiconductor device has resin The block piece 90 of at least part obstruction of through-hole 39a.90 consolidation of block piece it is embedded in the wide width part 39c of resin 39.In addition, Block piece 90 both can be fixed on resin 39 by bonding agent etc., can also merely be inserted in resin through-hole 39a.Utilize resistance Block piece 90 can prevent the 2nd insulation rouge 54 from leaking to the top of resin through-hole 39a.
Embodiment 6.
Figure 10 is the cross-sectional view for the semiconductor device that embodiments of the present invention 6 are related to.The semiconductor device has and will hinder The fixed gel 92 of block piece 90.Among resin through-hole 39a, gel is set in a manner of being in contact with the upper surface of block piece 90 92, so as to which block piece 90 is fixed.
Embodiment 7.
Figure 11 is the cross-sectional view for the semiconductor device that embodiments of the present invention 7 are related to.Block piece 90 is in resin through-hole 39a It is configured to move among resin through-hole 39a among (wide width part 39c).It is provided on block piece 90 and is formed by spring Elastomer 100.The gel 92 for being fixed on resin 39 is provided on elastomer 100.Also, if block piece 90 is in resin It is moved among through-hole 39a along the direction far from cooler 50, then flexible deformation occurs for elastomer 100.
In the case where block piece 90 is fixed on resin 39, if semiconductor module is close with cooler, the 1st insulation rouge 52 have to is diffused to peripheral direction.However, the semiconductor device that embodiment according to the present invention 7 is related to, is partly leading Module and cooler 50 close to when, the 2nd insulation rouge 54 applies upward power to elastomer 100, shrinks elastomer 100.By This, the 1st insulation rouge 52 enters among heat sink through-hole 12a.Then, if semiconductor module is far from cooler 50, elasticity Body 100 stretches and the 1st insulation rouge 52 among heat sink through-hole 12a is made to be back to original position (heat sink 12 and cooler Between 50).Thus, it is possible to inhibit to the diffusion of the 1st insulation rouge 52.In addition, elastomer 100 can flexible deformation, It is not limited to spring, such as can also be formed by rubber.
Embodiment 8.
Figure 12 is the cross-sectional view for the semiconductor device that embodiments of the present invention 8 are related to.What resin through-hole 39a was surrounded The wall surface of resin 39 is provided with the 1st check-valves 110, so that the 2nd insulation rouge 54 will not be to the direction opposite with the 1st insulation rouge 52 Flowing.1st check-valves 110 is formed by such as resin.The 2nd insulation rouge 54 can be prevented from semiconductor module using the 1st check-valves 110 The top of block leaks out.
Embodiment 9.
Figure 13 is the cross-sectional view for the semiconductor device that embodiments of the present invention 9 are related to.It is set in the lower surface of insulating trip 40 It is equipped with the 2nd check-valves 112, the 2nd check-valves 112 prevents the 1st insulation rouge 52 from being expanded to the peripheral direction of the 1st insulation rouge 52 It dissipates.Figure 14 is the bottom view of the 2nd check-valves 112 etc..2nd check-valves 112 is in plan view by heat sink through-hole 12a packet The threadiness protrusion that the mode enclosed is arranged.Ring-type is provided with multiple 2nd check-valves 112.It can be to the 1st using the 2nd check-valves 112 The flowing to peripheral direction of insulation rouge 52 is inhibited.
2nd check-valves is arranged between heat sink 12 and cooler 50, to prevent the 1st insulation rouge 52 to the 1st insulation rouge 52 Peripheral direction and be diffused, herein under the premise of the 2nd check-valves be able to carry out various modifications.For example, it is also possible to omit absolutely Embolium 40 and the 2nd check-valves is installed on heat sink 12, the 2nd check-valves can also be installed on cooler 50.In addition, such as Figure 15 It is shown, heat sink through-hole 12a can also be surrounded by multiple the 2nd check-valves 114 linearly formed.
Embodiment 10.
Figure 16 is the cross-sectional view for the semiconductor device 200 that embodiments of the present invention 10 are related to.Semiconductor device 200 has Seal member 202.Seal member 202 covers the resin 39 of semiconductor module.Terminal (main terminal 20 and the control of semiconductor module Terminal 30 processed) it is extend out to except seal member 202 through the insulating materials 204 contacted with seal member 202.Seal member Cooler 50 is fixed in 202 lower end.
Sealing area is formd using seal member 202, which includes between heat sink 12 and cooler 50 Region, the region being in contact with the side of semiconductor module, the region being in contact with the upper surface of semiconductor module, heat sink are logical Hole 12a and resin through-hole 39a.The sealing area is a series of continuous region.Insulation rouge is filled in sealing area 206.In addition, recess portion 50a is arranged in cooler 50, insulation rouge 206 fills up recess portion 50a.
Figure 17 is the top view of the semiconductor device of Figure 16.Figure 17 shows the inside of seal member 202.Insulate rouge 206 in plan view surround semiconductor module.
Since insulation rouge 206 fills up sealing area, the insulation rouge 206 between heat sink 12 and cooler 50 will not It is lost.Thus, it is possible to inhibit to the reduction of the thermal diffusivity of semiconductor module.Also, if heat sink 12 and cooler 50 Between insulation rouge 206 squeezed out to outer peripheral side, then the insulation rouge 206 among semiconductor module through-hole can be supplied to heat sink 12 Between cooler 50, therefore the rouge 206 that insulate is recycled in sealing area.The circulation of insulation rouge 206 facilitates semiconductor module The raising of the thermal diffusivity of block.
The regional seal comprising the region between heat sink 12 and cooler 50 is created into seal area using seal member Insulation rouge is filled up in the sealing area in domain, herein under the premise of be able to carry out various modifications.Figure 18 is the semiconductor that variation is related to The cross-sectional view of device.The lower end of resin 39 is connect by seal member 250 with cooler 50.The seal member 250 is with by heat sink The mode that region between 12 and cooler 50 surrounds is formed as cyclic annular.Sealing is formd by block piece 90 and seal member 250 Region.Insulation rouge 252 is filled in sealing area.
The material of seal member is not particularly limited, but by using metal, can expect the raising of heat dissipation effect. Recess portion 50a can also not be formed in cooler 50.In addition, the feature for the semiconductor device that above-mentioned each embodiment is related to can also Carried out with being appropriately combined using.
The explanation of label
10 semiconductor devices, 12 heat sinks, 12a heat sink through-hole, 16 semiconductor elements, 20 main terminals, 20a main terminal are logical Hole, 24 semiconductor elements, 30 control terminals, 39 resins, 39a, 39b resin through-hole, 39c wide width part, 40 insulating trips, 40a insulation Piece through-hole, 50 coolers, 52 the 1st insulation rouge, 54 the 2nd insulation rouge, 80 the 3rd insulation rouge, 90 block pieces, 92 gels, 100 elasticity Body, 110 the 1st check-valves, 112 the 2nd check-valves, 200 semiconductor devices, 202,250 seal members, 204 insulating materials, 206, 252 insulation rouge.

Claims (15)

1. a kind of semiconductor device comprising:
Semiconductor module, with semiconductor element, heat sink and resin, which connect with the semiconductor element, It is formed with heat sink through-hole in the heat sink, the resin is in a manner of exposing the lower surface of the heat sink by the semiconductor element Part and heat sink covering;
Cooler;
1st insulation rouge, be set between the lower surface of the heat sink and the cooler, by the heat sink with it is described cold But device is thermally connected;And
2nd insulation rouge is set to the heat sink through-hole in a manner of connecting with the 1st insulation rouge.
2. semiconductor device according to claim 1, which is characterized in that
The resin through-hole connecting with the heat sink through-hole is provided in the resin.
3. semiconductor device according to claim 2, which is characterized in that
The resin wide cut bigger than the width of the heat sink through-hole at least part formation width of the resin through-hole Portion,
The wide width part is provided with the 3rd insulation rouge.
4. semiconductor device according to claim 2, which is characterized in that
With the block piece for blocking at least part of the resin through-hole.
5. semiconductor device according to claim 4, which is characterized in that
With the gel that the block piece is fixed.
6. semiconductor device according to claim 4, which is characterized in that
With if the block piece among the resin through-hole along far from the cooler direction move if elasticity occurs The elastomer of deformation.
7. semiconductor device according to claim 2, which is characterized in that
The wall surface for the resin for surrounding the resin through-hole is provided with the 1st check-valves, so that the 2nd insulation rouge is not It can be flowed to the direction anti-with the 1st insulation lipid phase.
8. semiconductor device according to claim 3, which is characterized in that
The wall surface for the resin for surrounding the resin through-hole is provided with the 1st check-valves, so that the 2nd insulation rouge is not It can be flowed to the direction anti-with the 1st insulation lipid phase.
9. semiconductor device according to any one of claim 1 to 8, which is characterized in that
The 2nd check-valves for preventing the 1st insulation rouge diffusion is provided between the heat sink and the cooler.
10. semiconductor device according to claim 9, which is characterized in that
2nd check-valves is arranged in a manner of in plan view surrounding the heat sink through-hole.
11. semiconductor device according to any one of claim 1 to 8, which is characterized in that
It is provided with multiple heat sink through-holes and the 2nd insulation rouge.
12. semiconductor device according to claim 9, which is characterized in that
It is provided with multiple heat sink through-holes and the 2nd insulation rouge.
13. semiconductor device according to claim 10, which is characterized in that
It is provided with multiple heat sink through-holes and the 2nd insulation rouge.
14. a kind of semiconductor device comprising:
Semiconductor module, with semiconductor element, heat sink and resin, which connect with the semiconductor element, The resin is covered the semiconductor element and the heat sink in a manner of exposing the lower surface of the heat sink;
Cooler;
Regional seal comprising the region between the heat sink and the cooler is created seal area by seal member Domain;And
Insulate rouge, and the sealing area is filled up,
Heat sink through-hole is formed in the heat sink,
The resin through-hole connecting with the heat sink through-hole is formed in the resin,
The seal member covers the semiconductor module,
The sealing area includes the region being in contact with the side of the semiconductor module, the upper table with the semiconductor module Region, the heat sink through-hole and the resin through-hole that face is in contact.
15. semiconductor device according to claim 14, which is characterized in that
In the cooler, recess portion is set,
The insulation rouge fills up the recess portion.
CN201480080464.6A 2014-07-09 2014-07-09 Semiconductor device Active CN106489196B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2014/068297 WO2016006054A1 (en) 2014-07-09 2014-07-09 Semiconductor device

Publications (2)

Publication Number Publication Date
CN106489196A CN106489196A (en) 2017-03-08
CN106489196B true CN106489196B (en) 2019-04-12

Family

ID=55063729

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201480080464.6A Active CN106489196B (en) 2014-07-09 2014-07-09 Semiconductor device

Country Status (5)

Country Link
US (2) US10096566B2 (en)
JP (1) JP6361731B2 (en)
CN (1) CN106489196B (en)
DE (1) DE112014006793B4 (en)
WO (1) WO2016006054A1 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016006054A1 (en) * 2014-07-09 2016-01-14 三菱電機株式会社 Semiconductor device
JP7318558B2 (en) * 2020-02-20 2023-08-01 三菱電機株式会社 semiconductor equipment
JP7378382B2 (en) 2020-11-12 2023-11-13 三菱電機株式会社 semiconductor equipment
JP7471458B2 (en) * 2020-12-16 2024-04-19 三菱電機株式会社 Semiconductor device, power conversion device, and mobile body
US20240234237A1 (en) * 2021-09-21 2024-07-11 Mitsubishi Electric Corporation Power semiconductor device and method for manufacturing power semiconductor device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008210829A (en) * 2007-02-23 2008-09-11 Denso Corp Semiconductor device
JP2012004358A (en) * 2010-06-17 2012-01-05 Denso Corp Semiconductor module mounting structure
CN103247544A (en) * 2012-02-03 2013-08-14 三星电子株式会社 Package-on-package type semiconductor packages and methods for fabricating the same
CN103339724A (en) * 2011-02-09 2013-10-02 三菱电机株式会社 Power semiconductor module
WO2014041936A1 (en) * 2012-09-13 2014-03-20 富士電機株式会社 Semiconductor device, method for attaching heat dissipating member to semiconductor device, and method for manufacturing semiconductor device

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US96566A (en) * 1869-11-09 Improvement in envelopes
JP3677403B2 (en) * 1998-12-07 2005-08-03 パイオニア株式会社 Heat dissipation structure
JP2000332169A (en) * 1999-05-17 2000-11-30 Toshiba Corp Heat dissipating structure for heat generating object and electronic apparatus having it
US6767765B2 (en) * 2002-03-27 2004-07-27 Intel Corporation Methods and apparatus for disposing a thermal interface material between a heat source and a heat dissipation device
JP2004327477A (en) * 2003-04-21 2004-11-18 Alps Electric Co Ltd Heat generating component mounting structure
JP2005101259A (en) * 2003-09-25 2005-04-14 Toyota Motor Corp Assembled structure and assembling method of power module
JP2010192717A (en) 2009-02-19 2010-09-02 Sumitomo Electric Ind Ltd Cooling structure
JP2011096828A (en) * 2009-10-29 2011-05-12 Toyota Motor Corp Semiconductor module
CN102891119A (en) * 2011-07-20 2013-01-23 鸿富锦精密工业(深圳)有限公司 Radiating device
JP5747737B2 (en) 2011-08-26 2015-07-15 三菱電機株式会社 Semiconductor device and manufacturing method thereof
JP2013089672A (en) * 2011-10-14 2013-05-13 Mitsubishi Electric Corp Heat radiation structure of electronic component and electronic module having the same
WO2016006054A1 (en) * 2014-07-09 2016-01-14 三菱電機株式会社 Semiconductor device
KR102243287B1 (en) * 2014-10-15 2021-04-23 삼성전자주식회사 Semiconductor package and method for manufacturing the same

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008210829A (en) * 2007-02-23 2008-09-11 Denso Corp Semiconductor device
JP2012004358A (en) * 2010-06-17 2012-01-05 Denso Corp Semiconductor module mounting structure
CN103339724A (en) * 2011-02-09 2013-10-02 三菱电机株式会社 Power semiconductor module
CN103247544A (en) * 2012-02-03 2013-08-14 三星电子株式会社 Package-on-package type semiconductor packages and methods for fabricating the same
WO2014041936A1 (en) * 2012-09-13 2014-03-20 富士電機株式会社 Semiconductor device, method for attaching heat dissipating member to semiconductor device, and method for manufacturing semiconductor device

Also Published As

Publication number Publication date
JPWO2016006054A1 (en) 2017-04-27
US10096566B2 (en) 2018-10-09
CN106489196A (en) 2017-03-08
DE112014006793T5 (en) 2017-03-23
US10529682B2 (en) 2020-01-07
US20170047265A1 (en) 2017-02-16
JP6361731B2 (en) 2018-07-25
DE112014006793B4 (en) 2020-07-23
WO2016006054A1 (en) 2016-01-14
US20180374814A1 (en) 2018-12-27

Similar Documents

Publication Publication Date Title
CN106489196B (en) Semiconductor device
JP6037045B2 (en) Semiconductor module
US7772709B2 (en) Resin sealed semiconductor device and manufacturing method therefor
US8258622B2 (en) Power device package and semiconductor package mold for fabricating the same
US9171773B2 (en) Semiconductor device
CN104821302B (en) Semiconductor device
US20130056883A1 (en) Semiconductor device and method of manufacturing the same
US9412626B2 (en) Method for manufacturing a chip arrangement
US9837380B2 (en) Semiconductor device having multiple contact clips
JP6805176B2 (en) How to make integrated clips and leads, as well as circuits
JP2014187209A (en) Semiconductor device
CN105161467A (en) Power module for electric automobile
US9768095B2 (en) Semiconductor device and manufacturing method thereof
US20120133039A1 (en) Semiconductor package with thermal via and method of fabrication
JP5899680B2 (en) Power semiconductor module
US20150294919A1 (en) Semiconductor device and method for manufacturing same
CN108735614B (en) Semiconductor device and method for manufacturing semiconductor device
JP6021745B2 (en) Cooling member and semiconductor device
CN111527598A (en) Method and jig for manufacturing pin-fin type power module
JP2009231685A (en) Power semiconductor device
JP2020072094A (en) Power unit, method of manufacturing the same, and electric device having power unit
JP2020072102A (en) Power unit, method of manufacturing the same, and electric device having power unit
JP2004281804A (en) Circuit board
US20230098854A1 (en) Semiconductor device
KR20150048459A (en) Power Module Package

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant