CN105810666A - Fabrication method for package structure having electromagnetic shielding function - Google Patents

Fabrication method for package structure having electromagnetic shielding function Download PDF

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Publication number
CN105810666A
CN105810666A CN201610190042.5A CN201610190042A CN105810666A CN 105810666 A CN105810666 A CN 105810666A CN 201610190042 A CN201610190042 A CN 201610190042A CN 105810666 A CN105810666 A CN 105810666A
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China
Prior art keywords
chip
substrate
film
electro
encapsulating structure
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Pending
Application number
CN201610190042.5A
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Chinese (zh)
Inventor
王仕勇
包旭升
王孙艳
梁新夫
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JCET Group Co Ltd
Original Assignee
Jiangsu Changjiang Electronics Technology Co Ltd
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Filing date
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Application filed by Jiangsu Changjiang Electronics Technology Co Ltd filed Critical Jiangsu Changjiang Electronics Technology Co Ltd
Priority to CN201610190042.5A priority Critical patent/CN105810666A/en
Publication of CN105810666A publication Critical patent/CN105810666A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)

Abstract

The invention relates to a fabrication method for a package structure having an electromagnetic shielding function. The method comprises the following steps of 1, arranging a chip on a substrate by an inverted assembly method; 2, taking a film, carrying out vacuum film press on the upper surface of the chip so that the film covers the upper surface of the substrate and is in contact with the surface and the side surface of the chip; 3, removing the redundant film for shielding the surrounding of the chip by a photoetching developing etching process; 4, electrically connecting other chips or a reactive device to the substrate; and 5, carrying out encapsulation and ball placement on the substrate, and finally cutting the substrate to a single product. According to the fabrication method for the package structure having the electromagnetic shielding function, an adhesive film with a metal plating layer is directly pasted onto the surface of a radio frequency chip or other chips requiring electromagnetic shielding, so that the purpose of shielding electromagnetic interference is achieved.

Description

A kind of manufacture method of the encapsulating structure with electro-magnetic screen function
Technical field
The present invention relates to the manufacture method of a kind of encapsulating structure with electro-magnetic screen function, belong to technical field of semiconductor encapsulation.
Background technology
Existing electromagnetic armouring structure is: directly pass through the mode sputtering or electroplating on plastic-sealed body, covers metal on plastic-sealed body surface, plays the effect of electromagnetic shielding.Its defect being primarily present is as follows:
1, carrying out sputtering or plating mode on plastic-sealed body surface, technique is complex, and cost is costly；
2, coated metal compares difficult control with the adhesion of plastic-sealed body；
3, the module for multi-chip, is difficulty with the electromagnetic shielding to local single-chip.
Summary of the invention
The technical problem to be solved is the manufacture method providing a kind of encapsulating structure with electro-magnetic screen function for above-mentioned prior art, it adopts a kind of adhesive film with the coat of metal to be placed directly against radio frequency chip surface or other need on the chip of electromagnetic shielding, thus reaching the purpose of shielding electromagnetic interference.
This invention address that the technical scheme that the problems referred to above adopt is: the manufacture method of a kind of encapsulating structure with electro-magnetic screen function, said method comprising the steps of:
Step one, chip is arranged on substrate by reverse installation process；
Step 2, take a film, carry out vacuum film pressing at chip upper surface so that film covers upper surface of base plate, and fits with chip surface and side；
Step 3, removed the shielding unnecessary film of chip circumference by photoetching development etch process；
Step 4, other chips or passive device are electrically connected on substrate；
Step 5, substrate is encapsulated, plant ball, finally cut into single product.
Described chip is common chip, and described chip is arranged on substrate by underfill.
Described chip is surface acoustic wave chip, forms cavity after chip upper surface vacuum film pressing between chip and substrate.
Described film is the surface adhesive film with metal level.
Multiple flip-chip, on substrate, carry out vacuum film pressing at multiple chip upper surfaces
Compared with prior art, it is an advantage of the current invention that:
1, adopt film with the coat of metal and chip bonding, it is to avoid the coat of metal with plastic-sealed body in conjunction with bad problem；
2, encapsulation process is without adding traditional electroplating technology and metal sputtering processes, adopts pad pasting mode, easy to operate, simplifies technological process, significantly reduces processing cost；
3, encapsulate suitable in multi-chip modules, it is possible to one single chip is played the effect of electromagnetic shielding, can the more effective electromagnetic interference avoided between chip and chip；
4, suitable in the encapsulation of surface acoustic wave chip, it is possible to Simplified flowsheet step, encapsulation volume is reduced.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of a kind of encapsulating structure with electro-magnetic screen function of the present invention.
Fig. 2 is the schematic diagram of a kind of another embodiment of encapsulating structure with electro-magnetic screen function of the present invention.
Wherein:
Substrate 1
Metal coupling 2
Chip 3
Film 4
Plastic packaging material 5
Stannum ball 6
Underfill 7
Cavity 8.
Detailed description of the invention
Below in conjunction with accompanying drawing embodiment, the present invention is described in further detail.
As shown in Figure 1, a kind of encapsulating structure with electro-magnetic screen function in the present embodiment, it includes substrate 1, described substrate 1 there is chip 3 by metal coupling 2 upside-down mounting, it is coated with film 4 above described chip 3, described film 4 combines with chip 3 surface and side, is encapsulated with plastic packaging material 5, is provided with stannum ball 6 bottom described substrate 1 above described substrate 1.
Described chip 3 is common chip, is provided with underfill 7 between described chip 3 and substrate 1.
Described film 4 is the surface adhesive film with metal level.
Its manufacture method comprises the steps:
Step one, chip is arranged on substrate by reverse installation process；
Step 2, take a film, carry out vacuum film pressing at chip upper surface so that film covers upper surface of base plate, and fits with chip surface and side；
Step 3, removed the shielding unnecessary film of chip circumference by photoetching development etch process；
Step 4, other chips or passive device are electrically connected on substrate；
Step 5, substrate is encapsulated, plant ball, finally cut into single product.
Referring to Fig. 2, a kind of encapsulating structure with electro-magnetic screen function in the present embodiment, described chip 3 is surface acoustic wave chip, forms cavity 8 between chip 3 and substrate 1.
The chip of described film 4 cladding can have multiple.
In addition to the implementation, present invention additionally comprises the technical scheme that other embodiments, all employing equivalents or equivalence substitute mode are formed, all should fall within the protection domain of the claims in the present invention.

Claims (5)

1. the manufacture method of an encapsulating structure with electro-magnetic screen function, it is characterised in that said method comprising the steps of:
Step one, chip is arranged on substrate by reverse installation process；
Step 2, take a film, carry out vacuum film pressing at chip upper surface so that film covers upper surface of base plate, and fits with chip surface and side；
Step 3, removed the shielding unnecessary film of chip circumference by photoetching development etch process；
Step 4, other chips or passive device are electrically connected on substrate；
Step 5, substrate is encapsulated, plant ball, finally cut into single product.
2. the manufacture method of a kind of encapsulating structure with electro-magnetic screen function according to claim 1, it is characterised in that: described chip is common chip, and described chip is arranged on substrate by underfill.
3. the manufacture method of a kind of encapsulating structure with electro-magnetic screen function according to claim 1, it is characterised in that: described chip is surface acoustic wave chip, forms cavity after chip upper surface vacuum film pressing between chip and substrate.
4. the manufacture method of a kind of encapsulating structure with electro-magnetic screen function according to claim 1, it is characterised in that: described film is the surface adhesive film with metal level.
5. the manufacture method of a kind of encapsulating structure with electro-magnetic screen function according to claim 1, it is characterised in that: multiple flip-chip, on substrate, carry out vacuum film pressing at multiple chip upper surfaces.
CN201610190042.5A 2016-03-30 2016-03-30 Fabrication method for package structure having electromagnetic shielding function Pending CN105810666A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610190042.5A CN105810666A (en) 2016-03-30 2016-03-30 Fabrication method for package structure having electromagnetic shielding function

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610190042.5A CN105810666A (en) 2016-03-30 2016-03-30 Fabrication method for package structure having electromagnetic shielding function

Publications (1)

Publication Number Publication Date
CN105810666A true CN105810666A (en) 2016-07-27

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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109273418A (en) * 2018-11-08 2019-01-25 中国科学院苏州纳米技术与纳米仿生研究所南昌研究院 A kind of chip-packaging structure and method
CN110010507A (en) * 2019-04-04 2019-07-12 中电海康无锡科技有限公司 SIP module subregion is electromagnetically shielded packaging method
CN110248298A (en) * 2019-05-13 2019-09-17 苏州捷研芯纳米科技有限公司 Silicon microphone and its processing method
US10643955B2 (en) 2018-06-14 2020-05-05 Universal Scientific Industrial (Shanghai) Co., Ltd. Method of manufacturing SiP module based on double plastic-sealing and the SiP module
CN111642122A (en) * 2020-05-27 2020-09-08 维沃移动通信有限公司 Electromagnetic shielding structure and manufacturing method thereof
US10798814B2 (en) 2018-06-14 2020-10-06 Universal Scientific Industrial (Shanghai) Co., Ltd. SiP module and manufacturing method of the SiP module
CN112701096A (en) * 2020-12-22 2021-04-23 杰群电子科技（东莞）有限公司 Semiconductor module packaging process and semiconductor module
CN113140660A (en) * 2020-01-20 2021-07-20 光宝光电(常州)有限公司 Packaging structure and manufacturing method thereof
CN113604184A (en) * 2021-10-09 2021-11-05 武汉市三选科技有限公司 Chip packaging material, chip packaging structure and packaging method

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CN1293485A (en) * 1999-10-15 2001-05-02 汤姆森无线电报总公司 Electron element packaging method
US20030009864A1 (en) * 2001-07-12 2003-01-16 Samsung Electro-Mechanics Co., Ltd. Method for fabricating surface acoustic wave filter package
US20060151203A1 (en) * 2002-08-22 2006-07-13 Hans Krueger Encapsulated electronic component and production method
US20090170242A1 (en) * 2007-12-26 2009-07-02 Stats Chippac, Ltd. System-in-Package Having Integrated Passive Devices and Method Therefor
CN202705026U (en) * 2011-05-23 2013-01-30 埃普科斯股份有限公司 Apparatus having MEMS devices
CN103493371A (en) * 2011-04-21 2014-01-01 株式会社村田制作所 Circuit module

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Publication number Priority date Publication date Assignee Title
CN1293485A (en) * 1999-10-15 2001-05-02 汤姆森无线电报总公司 Electron element packaging method
US20030009864A1 (en) * 2001-07-12 2003-01-16 Samsung Electro-Mechanics Co., Ltd. Method for fabricating surface acoustic wave filter package
US20060151203A1 (en) * 2002-08-22 2006-07-13 Hans Krueger Encapsulated electronic component and production method
US20090170242A1 (en) * 2007-12-26 2009-07-02 Stats Chippac, Ltd. System-in-Package Having Integrated Passive Devices and Method Therefor
CN103493371A (en) * 2011-04-21 2014-01-01 株式会社村田制作所 Circuit module
CN202705026U (en) * 2011-05-23 2013-01-30 埃普科斯股份有限公司 Apparatus having MEMS devices

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10643955B2 (en) 2018-06-14 2020-05-05 Universal Scientific Industrial (Shanghai) Co., Ltd. Method of manufacturing SiP module based on double plastic-sealing and the SiP module
US10798814B2 (en) 2018-06-14 2020-10-06 Universal Scientific Industrial (Shanghai) Co., Ltd. SiP module and manufacturing method of the SiP module
CN109273418A (en) * 2018-11-08 2019-01-25 中国科学院苏州纳米技术与纳米仿生研究所南昌研究院 A kind of chip-packaging structure and method
CN110010507A (en) * 2019-04-04 2019-07-12 中电海康无锡科技有限公司 SIP module subregion is electromagnetically shielded packaging method
CN110248298A (en) * 2019-05-13 2019-09-17 苏州捷研芯纳米科技有限公司 Silicon microphone and its processing method
CN113140660A (en) * 2020-01-20 2021-07-20 光宝光电(常州)有限公司 Packaging structure and manufacturing method thereof
CN111642122A (en) * 2020-05-27 2020-09-08 维沃移动通信有限公司 Electromagnetic shielding structure and manufacturing method thereof
CN112701096A (en) * 2020-12-22 2021-04-23 杰群电子科技（东莞）有限公司 Semiconductor module packaging process and semiconductor module
CN113604184A (en) * 2021-10-09 2021-11-05 武汉市三选科技有限公司 Chip packaging material, chip packaging structure and packaging method

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