CN103905769A

CN103905769A - Video deinterlacing algorithm without local frame buffer and solution thereof

Info

Publication number: CN103905769A
Application number: CN201210572022.6A
Authority: CN
Inventors: 陈静炜
Original assignee: SUZHOU SAIYUAN MICROELECTRONIC Co Ltd
Current assignee: SUZHOU SAIYUAN MICROELECTRONIC Co Ltd
Priority date: 2012-12-26
Filing date: 2012-12-26
Publication date: 2014-07-02

Abstract

The invention provides a video deinterlacing algorithm without local frame buffer and a solution thereof in a USB3.0 external video processing chip. According to the solution, through superspeed bandwidth and duplexing capability provided by USB3.0 and with full utilization of storage resources of a PC platform or embedded platform, deinterlacing processing in the external vide processing chip is finished. The solution is mainly applied to a scene docked with a PC or embedded system which has a USB3.0 interface. Thus, system costs and system platform load are reduced remarkably.

Description

Without video deinterlacing algorithm and the solution of local frame buffer

Technical field

The invention relates to a kind of video deinterlacing algorithm and solution without local frame buffer, the ultrahigh speed bandwidth providing by USB3.0 exactly specifically and full duplex ability, make full use of the storage resources of PC platform or embedded platform, complete and in external video frequency processing chip, go interlacing processing.This scheme has low cost and platform underload feature.

Background technology

Popularizing gradually and constantly promoting with the coding/decoding capability of Intel processor along with USB3.0, more Video compression turns by CPU and replaces, but traditional SD vision signal need to be converted to the convenient progressive signal of processing of PC, and the conversion that utilizes software to complete to be interlaced to line by line will take larger cpu resource.

The object of the present invention is to provide a kind of novel solution annual reporting law and scheme, it utilizes the storage resources of ultrahigh speed bandwidth, full duplex ability and PC platform or embedded platform that SB3.0 provides, in the sampling process of interlaced video signal, complete the conversion being interlaced to line by line, simultaneously without extra frame memory space.

Summary of the invention

For above object, the present invention has defined the processing of interlaced data Zhong Dingchang and end field data and storage format, field, top and field, the end by sampling algorithm, end field data interpolation algorithm and has removed interlacing algorithm based on motion detection.Meanwhile, defined the complete complete process flow based on USB3.0 interface.The method comprises:

at the bottom of the occasion of top, field data is all down-sampled according to 1/2 in horizontal and vertical direction, in field, top and field, the end, all adopts 2X2 LPF.

the interpolation algorithm that edge keeps is calculated as follows.

1. edge judgement: centered by future position p (0,0), get top each 3 point of corresponding up-downgoing, be respectively p (1 ,-1), p (0 ,-1), p (1 ,-1) and p (1,1), p (0,1), p (1,1) if | p (0 ,-1)-p (0,1) | < Thr0, adopts vertical direction interpolation.If | p (1 ,-1)-p (1,1) | <| p (1 ,-1)-p (1,1) |, adopt upper left to lower right interpolation, on the contrary, adopt upper right to lower left interpolation.

2. interpolation adopts mean algorithm.

Accompanying drawing explanation

Fig. 1 is schematic flow sheet of the present invention.

Fig. 2 is work schematic diagram of the present invention.

In claims of present patent application, point out particularly theme of the present invention, and clearly it has been proposed to patent protection.With reference to detailed description and accompanying drawing below, the related structure can better understand the present invention and implementation method with and object, Characteristics and advantages.

Claims

In the external picture processing chip of USB3.0 without video deinterlacing algorithm and the solution of local frame buffer, this scheme comprises the following steps:

Top field data horizontal and vertical difference 1/2 is down-sampled and pass through USB3.0 ul transmissions to PC system, and down-sampled rear data are stored according to frame format, and end field data correspondence position retains;

In field, top, utilize adjacent two row data interpolatings to obtain middle row data, take edge to keep interpolation algorithm, the image after interpolation passes through USB3.0 ul transmissions to PC system according to frame format;

End field data horizontal and vertical respectively 1/2 down-sampled and by USB3.0 ul transmissions to PC system, down-sampled rear data are stored to 1) in corresponding Di Chang position;

End field data after down-sampled and the corresponding top field data obtaining by USB3.0 down link interweave;

Data after interweaving are subtracted each other and are carried out motion detection with the former frame respective pixel point value of obtaining by USB3.0 down link, if absolute value is greater than motion thresholding, corresponding 2x2 block is judged to be moving region, otherwise is judged to be stagnant zone;

If end field data correspondence position is judged to be stagnant zone, by data by USB3.0 ul transmissions to image correspondence position after interpolation;

If end field data correspondence position is judged to be moving region, directly this field, end is abandoned.
2. top field data processing method as claimed in claim 1, is characterized in that: horizontal and vertical direction is equal 1/2 down-sampled, to PC system, and according to frame format storage, retains corresponding data position, field, the end by USB3.0 ul transmissions.
3. low field data processing method as claimed in claim 1, is characterized in that: horizontal and vertical direction is equal 1/2 down-sampled, and by USB3.0 ul transmissions, to PC system, and according to frame format storage, and aforementioned top field data is by frame format storage.
4. motion detection mode and remove interlacing algorithm as claimed in claim 1, it is characterized in that: for non-moving region, field, top and field, the end directly interweave, for moving region, in field, top, utilize adjacent two row data interpolatings to obtain middle row data, take edge to keep interpolation algorithm.