CN100395744C - Method and system for realizing central control of central control unit to single board - Google Patents
Method and system for realizing central control of central control unit to single board Download PDFInfo
- Publication number
- CN100395744C CN100395744C CNB2005100635566A CN200510063556A CN100395744C CN 100395744 C CN100395744 C CN 100395744C CN B2005100635566 A CNB2005100635566 A CN B2005100635566A CN 200510063556 A CN200510063556 A CN 200510063556A CN 100395744 C CN100395744 C CN 100395744C
- Authority
- CN
- China
- Prior art keywords
- veneer
- control bus
- read
- bus
- write
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Information Transfer Systems (AREA)
Abstract
The present invention relates to a method capable of realizing centralized control of a single board by a central control unit. The present invention has the core that parallel signals are converted to a serial control bus firstly, and the centralized control of the central control unit on the single board is realized based on the serial control bus. The present invention realizes the centralized control of the central control unit on the single board by using less control buses, the one-to-one driving is adopted on a mother board, and thereby, the reliability of the system is enhanced. The present invention solves the problems of high cost and multiple maintenance because the centralized control on the single board is realized by using multiple control buses, high driving capability request because of a one-driving-multiple mode and difficult signal quality control in the prior art and solves the problems of high cost, low speed of configuration transmission/data reporting, difficult maintenance, etc. because a CPU is arranged on each single board which is visited by communication among boards.
Description
Technical field
The present invention relates to the telecommunications field, relate in particular to a kind of realization central control unit the central controlled method and system of veneer.
Background technology
Usually equipment is made up of the veneer of difference in functionality, and veneer then mainly is made up of some chips, and these chips must depend on CPU (central processing unit), could operate as normal as the control of CPU or single-chip microcomputer.Most of chip is directly controlled by data, address, read-write bus by CPU (central processing unit), also has some chips to pass through SDH physical interface (Synchronous PhysicalInterface by CPU (central processing unit); SPI), two-wire bi-directional synchronization universal serial bus (Inter-Integrated Circuit; IIC) etc. the bus of type is controlled.Usually data, address, read-write bus are referred to as control bus, buses such as SPI, IIC are realized according to related protocol by control bus.Generally speaking, the complicated veneer of control adopts CPU to control, and controls better simply veneer and adopts single-chip microcomputer to control, and its principle is similar.
With the optical-fiber network communication apparatus is example, and veneers such as cross board, clock board, wiring board, tributary card, database, Order wire unit are arranged in optical network device, and every kind of veneer all need be controlled as CPU by CPU (central processing unit).The CPU control mode of using mainly contains two kinds at present, and a kind of is decentralised control, and another is parallel centralized control.Tell about these two kinds of prior aries of present use below in detail.
Prior art one related to the present invention adopts the technical scheme of decentralised control.As shown in Figure 1, the core of this scheme is: at first dispose cpu system on the master control borad 101 of equipment, and on all veneers 102 that need master control borad to control, also dispose cpu system, cpu system 104 controls thus of chip 103 on the veneer, carry out communication by communication between plate 105 and master control borad 101 then, realize that configuration distributing and data report.
By above-mentioned prior art one scheme that is decentralised control as can be seen, prior art one need all be placed with cpu system on every veneer, that is to say to be provided with cover BIOS, board software and an inter-plate communication system by every veneer.The equipment that has has also increased standby communication channel and passage switching controls for fear of the significant impact that inter-plate communication system lost efficacy and causes.Therefore there is following shortcoming in the technical scheme of prior art one:
1, cost height.From hardware, every veneer all needs a CPU (central processing unit) and inter-plate communication system; From software, every veneer all needs a cover board software, drive software etc.
2, configuration distributing/data report speed is slow.Master control borad must could be visited veneer by communication between plate, causes configuration distributing and data aggregation to depend between plate communication and just can finish.
3, difficult in maintenance, needs are safeguarded the version Matching Relationship of a plurality of board softwares and host software.
Prior art two related to the present invention adopts parallel central controlled technical scheme, this scheme is mainly used on some small-sized equipment, as shown in Figure 2, its core is: cpu data line, address wire, sheet on the master control borad 201 are selected to read all control buss such as write and all deliver on the veneer 203 that needs control by CPU parallel control bus assignment motherboard 202 cablings.Every veneer needs to connect the control bus more than 40 at least.Master control borad 201 is by the chip 204 on the direct read control veneer 203.
By such scheme as can be seen, adopt parallel central controlled scheme only need on master control borad, dispose a cover BIOS and a host software.But adopt this scheme to have other problem:
1, because cpu control bus quantity is very many, data line, address wire, sheet are selected to read and are write line one and have more than 40, need take the very many motherboard connector resources of veneer, adopt parallel central controlled scheme can only be used for the less system in plate position, so poor expandability.
2, control bus generally can only adopt one to drive many modes at the motherboard upward wiring, and signal then is activated the restriction of ability, the difficult control of signal quality.
By above-mentioned analysis as can be seen, two kinds of used major control modes all cut both ways at present, if employing decentralized control, then all need to be provided with CPU mini system and inter-plate communication system on every veneer, except increasing many Material Costs, also to drop into a lot of software development/maintenance costs.And master control borad causes configuration distributing and data to report the restriction that is subjected to inter-plate communication system by communications access veneer between plate.If but adopt parallel centralized control, the motherboard cabling is difficulty relatively, each plate position all needs more than 40 control bus, need a large amount of veneer connectors, poor expandability, and it is very high that control bus generally can only adopt the mode how of driving that driving force is required at the motherboard upward wiring, and signal quality is difficult to control.
Summary of the invention
The purpose of this invention is to provide a kind of realization central control unit to the central controlled method of veneer, by the present invention, solved and to have used a lot of control buss could realize the centralized control of veneer is caused dropping into a lot of costs and maintenance in the prior art two, solved in the prior art two one and driven many modes and driving force is required very high, signal quality also is difficult to the problem of control; In addition by the invention solves prior art one since need all be placed with on the every veneer cpu system and must be by plate between communication could visit problems such as cost height, configuration distributing/data report speed that veneer causes be slow, difficult in maintenance.
The objective of the invention is to be achieved through the following technical solutions:
A kind of realization central control unit provided by the invention comprises the central controlled method of veneer:
The frame structure of A, structure Serial Control bus, according to described frame structure with the read-write of central control unit output, address, data parallel conversion of signals on the Serial Control bus, and produce the read/write frame head according to the frame structure of described Serial Control bus, perhaps comprise the clock signal of read/write frame head;
B, realize the centralized control of central control unit to veneer based on described Serial Control bus.
Wherein, described steps A specifically comprises:
A23, according to described frame structure will read and write, address signal is transformed on the Serial Control bus, and produces the read/write frame head according to the frame structure of described Serial Control bus;
A24, described Serial Control bus, read/write frame head, clock signal are delivered on the Be Controlled veneer and handled;
Or,
A25, according to described frame structure will read and write, address signal is transformed on the Serial Control bus, and produces the clock signal that comprises the read/write frame head according to the frame structure of described Serial Control bus;
The clock signal of A26, just described Serial Control bus, band read/write frame head is delivered on the Be Controlled veneer and is handled.
Wherein, described step B specifically comprises:
B1, send the clock signal of described Serial Control bus, band read/write frame head to veneer;
B2, described veneer receive described Serial Control bus, utilize the clock signal of band read/write frame head, convert described Serial Control bus to parallel signal according to the frame structure of Serial Control bus;
B3, described veneer conduct interviews to the chip on the veneer with described parallel signal.
Wherein, when the control single board chip carries out write information:
Described step B1 specifically comprises:
B11, with described Serial Control bus, have the clock signal of writing frame head and send veneer to;
B12, determine the veneer of visit according to the address information in the described Serial Control bus frame structure;
Described step B3 specifically comprises:
B31, described parallel signal write single board chip, realize the centralized control to veneer.
When the control veneer carried out read message, described step B1 specifically comprised:
B14, send the clock signal of described Serial Control bus, band read/write frame head to veneer;
B15, according to the address information of described Serial Control bus frame structure the Serial Control bus is switched to corresponding veneer and receive;
B16, described Serial Control bus is sent to corresponding veneer.
Described step B15 specifically comprises:
B151, determine the plate position of visit according to the address information of described Serial Control bus frame structure;
B152, universal serial bus is switched to corresponding veneer according to described plate position information.
When the control veneer carried out read message, described step B3 specifically comprised:
B35, described veneer judge whether to visit this single board chip according to the address information in the described Serial Control bus frame structure, if then read data in the single board chip, execution in step B36 then according to reading frame head; Otherwise, do not deal with;
B36, according to the frame structure of described Serial Control bus described data of reading are put into the Serial Control bus and the direction of described Serial Control bus is switched to veneer and send;
B37, the data-switching on the Serial Control bus is become parallel signal and sends to central control unit, realize veneer concentrated read control.
A kind of realization central control unit provided by the invention is to the central controlled system of veneer, comprise central authorities' control list and veneer, system is transformed into the parallel signal that central control unit sends on the Serial Control bus, realizes the centralized control of central control unit to veneer based on described Serial Control bus;
And described system also comprises: the first control bus string and processing unit and string and bus assignment unit:
Described first control bus string and processing unit are transformed into the parallel signal that central control unit transmits on the universal serial bus, and produce the read/write frame head according to the frame structure of described Serial Control bus, or produce the clock signal that comprises the read/write frame head, by described string and bus assignment unit described Serial Control bus is sent to veneer then.
Wherein, described system also comprises second control bus string and the processing unit;
Described second control bus string and processing unit convert the described Serial Control bus that veneer receives to parallel signal, and read and write according to read/write frame head control single board chip.
Wherein, described central control unit comprises: CPU or single-chip microcomputer.
As seen from the above technical solution provided by the invention, because the present invention at first is transformed into parallel signal on the Serial Control bus according to certain frame format, realize the centralized control of central control unit based on described Serial Control bus then to veneer, so by the present invention, can use less control bus to realize the centralized control of central control unit to veneer, extensibility is good, and can adopt man-to-man driving on motherboard, thus the enhanced system reliability; When the plate position not for a long time, also can on motherboard, adopt one to drive many cablings, signal quality is controlled easily, solved must use in the prior art two that a lot of control buss could realize the centralized control of veneer is caused must drop into a lot of costs and maintenance, solved and can only adopt one to drive many modes and driving force is required very high in the prior art two, signal quality also is difficult to the problem of control; And can well realize the CPU centralized control by the present invention, need not on every veneer, all to be placed with cpu system, need not also can visit veneer by communication between plate, solved in the prior art one since need all be placed with on the every veneer cpu system and must be by plate between communication could visit problems such as cost height, configuration distributing/data report speed that veneer causes be slow, difficult in maintenance.
Description of drawings
Fig. 1 is the synoptic diagram of decentralised control in the prior art one;
Fig. 2 is a parallel central controlled synoptic diagram in the prior art two;
Fig. 3 is the process flow diagram of the method for the invention;
Fig. 4 is the central controlled synoptic diagram of serial among the present invention;
Fig. 5 is the central controlled theory diagram of serial of the present invention.
Embodiment
A kind of realization central control unit provided by the invention is to the central controlled method of veneer, its core be parallel signal that quantity is very many according to specific frame structure string and be transformed into and be used on the high-speed serial bus realizing that CPU reads and writes controlled single board chip, thereby realize the centralized control of central control unit to veneer.In addition, the present invention is by realizing the central controlled method of central control unit to veneer based on the Serial Control bus, can on the motherboard cabling, adopt man-to-man mode, thereby can adopt less control bus to realize the centralized control of central control unit, solve a series of problems such as communication between above-mentioned cost, connector, plate, driving force, signal quality veneer.
The embodiment that the method for the invention provides at first is transformed into parallel signal on the Serial Control bus; Realize the centralized control of central control unit based on described Serial Control bus then to veneer.
For example, if the control address scope of veneer is made as 64Mbytes, control line has 26 address wires, 16 data lines, 2 read-write lines, at least 1 heel piece route selection, 45 control buss altogether so.Between master control borad and veneer, by adopting universal serial bus at a high speed, 45 control buss frame format according to a preconcerted arrangement is transformed on the universal serial bus transmits, receive the synchronous clock and the frame head of Serial Control bus again as veneer by master control borad output read/write frame head and high-speed clock signal, after veneer receives information on the described Serial Control bus, again the information translation on the Serial Control bus is become parallel signal, and single board chip is carried out read-write operation, and then realize the centralized control of CPU (central processing unit) to veneer according to described frame head and described parallel signal.Because there are two operations of read and write in master control control, so universal serial bus adopts two-way control
The specific implementation process of the embodiment of the invention comprises as shown in Figure 3:
Step S501, the frame structure of structure Serial Control bus.
The present invention is transformed into the parallel signal that CPU (central processing unit) transmits on the Serial Control bus by a kind of frame structure of Serial Control bus of agreement, comprises read/write flag position and address information bit in the described frame structure.Be exemplified below:
If adopt a universal serial bus, then can arrange Serial Control bus frame structure is shown in the table one, is the read-write sign at the beginning part of frame structure, and the back is respectively address and data.
| / write zone bit | / read zone bit | Address 0,1,2,3...... | Data 0,1,2,3...... |
Table one
In order to guarantee reliability, also can insert check bit in the frame format, as shown in Table 2:
| / write zone bit | / read zone bit | Address 0,1,2,3...... | Check bit 0 | Data 0,1,2,3...... | Check bit 1 |
Table two
If adopt two universal serial bus, promptly need with read-write, data,
Parallel signals such as address are assigned on two Serial Control buses, the frame structure that then can arrange described Serial Control bus as shown in Table 3, the beginning part at frame structure is the read-write sign, and the back is respectively address information and data message, and adds check bit alternatively as required.
| / write zone bit | Address 0,2,4,6...... | Check bit 0 | Data 0,2,4,6...... | Check bit 2 |
| / read zone bit | Address 1,3,5,7...... | Check bit 1 | Data 1,3,5,7...... | Check bit 3 |
Table three
The universal serial bus quantity speed of many visits veneer more is fast more, and the quantity of universal serial bus can also be three, four or more, and along with the increase of Serial Control bus, the form of described frame structure is done corresponding the variation.But because CPU (central processing unit),,, also can not surpass the intrinsic read or write speed of CPU, but also might cause the process relative complex going here and there and handle a little even universal serial bus is many again as the read or write speed relative fixed of CPU.Therefore more Serial Control bus is not set usually.
Step S502 is transformed on the Serial Control bus according to the parallel signal of described frame structure with central control unit output.Usually the visit to veneer comprises two processes: the first writes the data message that CPU (central processing unit) transmits in the single board chip; It two is the data that read on the single board chip, and sends the data that read to CPU (central processing unit).
Data are being write in the process of single board chip, described step S502 specifically comprises: be transformed on the Serial Control bus according to the parallel signals such as read-write, address and data message of described frame structure with central control unit output.
In the data that read on the single board chip, and the data that read are sent in the process of central control unit, described step S502 specifically comprises: according to described frame structure read-write, the address signal of central control unit output is transformed on the Serial Control bus and produces and read frame head; Direction with described Serial Control bus switches to the central control unit receipts and changes latent period over to then.
Through above-mentioned be transformed into described parallel signal on the Serial Control bus after, the present invention just can be based on the centralized control of described Serial Control bus realization central control unit to veneer.The specific implementation process comprises:
Step S503 sends described Serial Control bus to veneer;
Step S504, described veneer receive described Serial Control bus, convert described Serial Control bus to parallel signal according to the information of the frame structure of Serial Control bus;
Step S505 conducts interviews to veneer according to the frame structure and the described parallel signal of Serial Control bus.
Data are being write in the process of single board chip:
Described step S503 specifically comprises:
At first send described Serial Control bus to veneer; Determine the veneer of visit then according to the address information in the described frame structure.
Described step S505 specifically comprises:
According to described parallel signal the data message in the described parallel signal is write in the described single board chip; According in the frame structure writing sign and address information writes single board chip with described parallel signal, realization is to the centralized control of veneer.
In the data that read on the single board chip, and the data that read are sent in the process of central control unit:
Step S503 specifically comprises:
Step 1 is issued veneer based on described Serial Control bus with described ensemble;
Step 2 according to the definite plate position of visiting of the address information of described frame structure, switches to corresponding veneer according to described plate position with the Serial Control bus and receives;
Step 3 sends to corresponding veneer based on described Serial Control bus with described signal.
Described step S505 specifically comprises:
Step 1, described veneer judges whether to visit this single board chip according to the address information in the described frame structure, if, then indicating the data of reading in the single board chip according to reading in the frame structure, execution in step two then; Otherwise, do not deal with;
Step 2 is put into the described data based described frame structure of reading the Serial Control bus and the direction of described Serial Control bus is switched to veneer and sends;
Step 3 becomes parallel signal to send to central control unit the data-switching on the described Serial Control bus, realizes the centralized control to veneer.
A kind of realization central control unit provided by the invention is to the central controlled system of veneer, as shown in Figure 4, this system comprises master control borad 310, veneer 320, on described master control borad 310, CPU (central processing unit) 311 is set, as cpu system or single-chip microcomputer, control bus string and processing unit 312 and universal serial bus allocation units 313; Control bus string and processing unit 321 and controlled chip 322 are set on described veneer 320.Control bus string on control bus string on the master control borad and processing unit 312 and universal serial bus allocation units 313, the veneer and processing unit 321 all can adopt logic chip (as field programmable gate array (FPGA) or CPLD (CPLD) etc.) to realize.
Each adopts string and conversion processing unit to carry out transceive data on master control borad 310 and veneer 320 in the present invention.Described master control borad 310 at first is transformed into the parallel signals such as data-signal, address signal and read-write control signal that CPU (central processing unit) 311 transmits on the Serial Control bus, and produces read-write frame head and clock; After described veneer 320 receives the universal serial bus of master control borad, convert parallel control bus (parallel signal) to, and then read and write controlled chip 322 according to frame structure.
Theory diagram below in conjunction with system of the present invention is explained in detail system of the present invention.As shown in Figure 5:
When veneer is carried out write operation, parallel signals such as the read-write that the control bus string of master control borad and processing unit transmit CPU (central processing unit) according to the frame structure of Serial Control bus, address, data are transformed on the Serial Control bus and produce writes frame head and clock, or utilize breach clock generating clock (described clock comprises frame head), by the universal serial bus allocation units ensemble is issued all veneers then, and read-write sign and address in the supervisory frame structure, according to the plate position information (promptly visiting which veneer) of the visit of the address in the described frame structure; After the control bus string of veneer and processing unit are received frame head and Serial Control bus, frame structure and clock according to described Serial Control bus convert the Serial Control bus to parallel signal, and according in the described parallel signal writing the sign and the address data message in the parallel signal is write the single board chip register of being chosen.
When control veneer when carrying out read message, when reading, be divided into two stages to operate, first stage is that master control borad send read-write sign and address to veneer, second stage is that master control borad receives the data that veneer is sent here.Specifically comprise:
At first the control bus string of master control borad and processing unit will be read and write, address signal is transformed on the universal serial bus according to frame structure and frame head and clock are read in generation, or utilize breach clock generating clock (described clock comprises frame head), give the universal serial bus allocation units, then by switch unit one (as among Fig. 5 1.) change the direction of universal serial bus into master control borad and receive, and enter latent period; By the universal serial bus allocation units ensemble is issued all veneers, and read-write sign and address in the supervisory frame structure, judge which plate position of visit, and according to plate position information, by switch unit two (as among Fig. 5 2.) the Serial Control bus changed into from this plate position choosing receives; After the control bus string of veneer and processing unit are received frame head and Serial Control bus, go here and there and change according to the frame structure of Serial Control bus and clock, judge whether it is this board chip of visit according to separating the read-write sign and the address of getting off, if not then not handling, if the reader board chip is then according to address read-outing data, and the frame result of data based Serial Control bus put on the Serial Control bus, then by switch unit three (as among Fig. 5 3.) change the direction of Serial Control bus into veneer and send; At this moment the Serial Control bus has just become the direction from the veneer to the master control borad fully, the latent period of master control borad of the present invention finishes after veneer change Serial Control bus direction, therefore after the master control borad latent period finishes, get off according to the Data Receiving that frame structure and clock are sent veneer here, give CPU (central processing unit) by control bus string and processing unit with the information such as data that receive then, as CPU or single-chip microcomputer.
In addition, the present invention also can visit veneer CPLD (Complex Programmable Logical Device by universal serial bus; CPLD) simulate I/O (I/O) pin of CPU (central processing unit), be used to realize field programmable gate array (Field ProgrammableGate Array; Interfaces such as FPGA) loading, SPI, IIC.
By system provided by the present invention, can adopt less control bus to realize the centralized control of central control unit to veneer, solved a series of problems such as communication between cost in the prior art, connector, plate, driving force, signal quality.
The above; only be the preferable embodiment of the present invention; but protection scope of the present invention is not limited thereto; anyly be familiar with those skilled in the art in the technical scope that the present invention discloses; the variation that can expect easily or replacement; as, be not limited to Serial Control bus string and processing unit and universal serial bus allocation units are arranged in the master control borad, are not limited to Serial Control bus string and processing unit are arranged in the veneer etc., all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection domain of claim.
Claims (10)
1. a realization central control unit is to the central controlled method of veneer, and the system based on comprising central control unit, veneer and control bus is characterized in that, comprising:
The frame structure of A, structure Serial Control bus, according to described frame structure with the read-write of central control unit output, address, data parallel conversion of signals on the Serial Control bus, and produce the read/write frame head according to the frame structure of described Serial Control bus, perhaps comprise the clock signal of read/write frame head;
B, realize the centralized control of central control unit to veneer based on described Serial Control bus.
2. method according to claim 1 is characterized in that, described steps A specifically comprises:
A23, according to described frame structure will read and write, address signal is transformed on the Serial Control bus, and produces described read/write frame head according to the frame structure of described Serial Control bus;
A24, described Serial Control bus, read/write frame head, clock signal are delivered on the Be Controlled veneer and handled;
Or,
A25, according to described frame structure will read and write, address signal is transformed on the Serial Control bus, and produces the described clock signal that comprises the read/write frame head according to the frame structure of described Serial Control bus;
A26, described Serial Control bus, the described clock signal that comprises the read/write frame head are delivered on the Be Controlled veneer and handled.
3. method according to claim 1 is characterized in that, described step B specifically comprises:
B1, send described Serial Control bus, the described clock signal of read/write frame head that comprises to veneer;
B2, described veneer receive described Serial Control bus, utilize the described clock signal that comprises the read/write frame head, convert described Serial Control bus to parallel signal according to frame structure;
B3, described veneer adopt described parallel signal that the chip on the veneer is conducted interviews.
4. method according to claim 3 is characterized in that, when the control single board chip carries out write information,
Described step B1 specifically comprises:
B11, with described Serial Control bus, comprise that the clock signal of writing frame head sends veneer to;
B12, determine the veneer of visit according to the address information in the described Serial Control bus frame structure;
Described step B3 specifically comprises:
B31, described parallel signal is write single board chip, realize centralized control veneer.
5. method according to claim 3 is characterized in that, when the control veneer carried out read message, described step B1 specifically comprised:
B14, send described Serial Control bus, the described clock signal of read/write frame head that comprises to veneer;
B15, according to the address information of described Serial Control bus frame structure the Serial Control bus is switched to corresponding veneer and receive;
B16, described Serial Control bus is sent to corresponding veneer.
6. method according to claim 5 is characterized in that, described step B15 specifically comprises:
B151, determine the plate position of visit according to the address information of described Serial Control bus frame structure;
B152, universal serial bus is switched to corresponding veneer according to described plate position information.
7. method according to claim 3 is characterized in that, when the control veneer carried out read message, described step B3 specifically comprised:
B35, described veneer judge whether to visit this single board chip according to the address information in the described Serial Control bus frame structure, if then read data in the single board chip, execution in step B36 then according to reading frame head; Otherwise, do not deal with;
B36, according to the frame structure of described Serial Control bus described data of reading are put into the Serial Control bus and the direction of described Serial Control bus is switched to veneer and send;
B37, the data-switching on the Serial Control bus is become parallel signal and sends to central control unit, realize veneer concentrated read control.
8. a realization central control unit comprises veneer and central control unit to the central controlled system of veneer, it is characterized in that:
System is transformed into the parallel signal that central control unit sends on the Serial Control bus, and realizes the centralized control of central control unit to veneer based on described Serial Control bus;
And described system also comprises the first control bus string and processing unit and string and bus assignment unit:
Described first control bus string and processing unit are transformed into the parallel signal that central control unit transmits on the universal serial bus, and produce the read/write frame head according to the frame structure of described Serial Control bus, or produce the clock signal that comprises the read/write frame head, by described string and bus assignment unit described Serial Control bus is sent to veneer then.
9. system according to claim 8 is characterized in that:
Also comprise second control bus string and the processing unit;
Convert the described Serial Control bus that veneer receives to parallel signal by described second control bus string and processing unit, and read and write according to described read/write frame head control single board chip.
10. according to Claim 8 to 9 any described systems, it is characterized in that described central control unit comprises: CPU or single-chip microcomputer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100635566A CN100395744C (en) | 2005-04-12 | 2005-04-12 | Method and system for realizing central control of central control unit to single board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100635566A CN100395744C (en) | 2005-04-12 | 2005-04-12 | Method and system for realizing central control of central control unit to single board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1848103A CN1848103A (en) | 2006-10-18 |
| CN100395744C true CN100395744C (en) | 2008-06-18 |
Family
ID=37077670
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005100635566A Active CN100395744C (en) | 2005-04-12 | 2005-04-12 | Method and system for realizing central control of central control unit to single board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100395744C (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101895523A (en) * | 2009-05-22 | 2010-11-24 | 华为技术有限公司 | Board-to-board communication method, system, mainboard and service single board |
| CN102346501A (en) * | 2010-07-30 | 2012-02-08 | 中兴通讯股份有限公司 | Equipment with unified machine frame management framework and management control method thereof |
| CN106487549A (en) * | 2015-08-26 | 2017-03-08 | 中兴通讯股份有限公司 | With the method communicated nothing central processing unit veneer and communication apparatus |
| CN107766273B (en) * | 2017-11-09 | 2020-07-31 | 安徽皖通邮电股份有限公司 | Method for realizing data interaction between boards by two-line coding and decoding and localbus mutual conversion |
| CN112835840B (en) * | 2021-02-07 | 2024-06-04 | 深圳市英威腾交通技术有限公司 | Serial communication system |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4683530A (en) * | 1984-04-10 | 1987-07-28 | Telemecanique Electrique | Serial information transfer protocol |
| US4827477A (en) * | 1987-05-15 | 1989-05-02 | Grumman Aerospace Corporation | Bus interface unit |
| US6128311A (en) * | 1998-02-26 | 2000-10-03 | 3Com Corporation | Method and system for interfacing parallelly interfaced devices through a serial bus |
| CN1549141A (en) * | 2003-05-21 | 2004-11-24 | 华为技术有限公司 | Data transmission method and apparatus based on serial interface |
-
2005
- 2005-04-12 CN CNB2005100635566A patent/CN100395744C/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4683530A (en) * | 1984-04-10 | 1987-07-28 | Telemecanique Electrique | Serial information transfer protocol |
| US4827477A (en) * | 1987-05-15 | 1989-05-02 | Grumman Aerospace Corporation | Bus interface unit |
| US6128311A (en) * | 1998-02-26 | 2000-10-03 | 3Com Corporation | Method and system for interfacing parallelly interfaced devices through a serial bus |
| CN1549141A (en) * | 2003-05-21 | 2004-11-24 | 华为技术有限公司 | Data transmission method and apparatus based on serial interface |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1848103A (en) | 2006-10-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10467110B2 (en) | Implementing cable failover in multiple cable PCI Express IO interconnections | |
| US10838816B2 (en) | Detecting and sparing of optical PCIE cable channel attached IO drawer | |
| EP0962863A2 (en) | Dasd concurrent maintenance for a pci based dasd subsystem | |
| CN100541444C (en) | The management system of multiple main board system | |
| CN100424668C (en) | Automatic configurating system for PCI-E bus | |
| CN101681322B (en) | Memory chip for high capacity memory subsystem supporting replication of command data | |
| CN100395744C (en) | Method and system for realizing central control of central control unit to single board | |
| US20030174724A1 (en) | Synchronous low voltage differential I/O buss | |
| CN211685069U (en) | VIO and DIO compatible train control host | |
| CN116737624B (en) | High-performance data access device | |
| CN210627095U (en) | General ruggedized computer that contains various bus motherboards | |
| CN103530256B (en) | The process device and method of CPCIe and PCI protocol data | |
| US20230240036A1 (en) | Riser cards with inline slots | |
| CN213276462U (en) | Two-way server mainboard and two-way server | |
| CN216352292U (en) | Server mainboard and server | |
| CN109033002A (en) | A kind of multipath server system | |
| US6581121B1 (en) | Maintenance link system and method | |
| CN103544133B (en) | Conversion device and conversion method | |
| US20070226456A1 (en) | System and method for employing multiple processors in a computer system | |
| CN115202257B (en) | LPC bus protocol conversion and equipment parallel control device and method | |
| CN219456855U (en) | Processor workstation main board and server | |
| CN217467579U (en) | Server directly links backplate and hard disk signal identification transmission device | |
| CN221927110U (en) | Processor, high-speed IO system and computer equipment | |
| CN100498679C (en) | System for sharing memory mechanism between modules and method thereof | |
| CN100362504C (en) | Single-board computer mainboard for industrial computer |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |