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We check this constrain and\nfail it on control path if it is not happening.\nSo far we used RC value for DC but we have different RC and DC\nlimitations, so checking the RC cap on DC caused a failure on data path\ninstead of control path.\n\nFixes: b9967a9d722a (\"mlx5: Create DC transport QPs\")\nSigned-off-by: Or Har-Toov \nReviewed-by: Michael Guralnik \nSigned-off-by: Yishai Hadas ","shortMessageHtmlLink":"mlx5: Use correct value of max WQE size for DC"}},{"before":"93d83000546af7493979a98caf829a43c3a94f6c","after":"c63abc09fe0f0d2c94d01e6bffa493d71fa86a0c","ref":"refs/heads/mlx5_misc","pushedAt":"2023-12-14T13:48:54.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"yishaih","name":"Yishai Hadas","path":"/yishaih","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4038053?s=80&v=4"},"commit":{"message":"mlx5: Provide reg C0 value for matching egress traffic\n\nWhen provided the value can be used to match egress traffic from the\nlocal vport in the FDB.\n\nSigned-off-by: Mark Bloch \nSigned-off-by: Yishai Hadas ","shortMessageHtmlLink":"mlx5: Provide reg C0 value for matching egress traffic"}},{"before":"27257eb5cb6f8ff5e14d974f4a7a82f56cba829a","after":"93d83000546af7493979a98caf829a43c3a94f6c","ref":"refs/heads/mlx5_misc","pushedAt":"2023-11-28T15:34:30.000Z","pushType":"push","commitsCount":27,"pusher":{"login":"yishaih","name":"Yishai Hadas","path":"/yishaih","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4038053?s=80&v=4"},"commit":{"message":"mlx5: Provide reg C0 value for matching egress traffic\n\nWhen provided the value can be used to match egress traffic from the\nlocal vport in the FDB.\n\nSigned-off-by: Mark Bloch \nSigned-off-by: Yishai Hadas ","shortMessageHtmlLink":"mlx5: Provide reg C0 value for matching egress traffic"}},{"before":"4827e3388baf96f2bf630246567ab40467b7352c","after":"27257eb5cb6f8ff5e14d974f4a7a82f56cba829a","ref":"refs/heads/mlx5_misc","pushedAt":"2023-11-05T12:11:06.000Z","pushType":"push","commitsCount":75,"pusher":{"login":"yishaih","name":"Yishai Hadas","path":"/yishaih","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4038053?s=80&v=4"},"commit":{"message":"mlx5: Fix the rdma_tracepoint() code\n\nAs part of adding rdma_tracepoint() to _mlx5_post_send() the total\nlength of the SGs is calculated unconditionally even if the trace point\nmechanism is compiled out.\n\nThe above extra code in the data path must be prevented.\n\nAs such, the trace point was changed to include some exiting data as of\nnum_sge.\n\nIn addition, drop the dummy trace point function and have an empty\ndefinition for rdma_tracepoint as was done for rxe and the efa drivers.\n\nFixes: ec4b65b3541a (\"mlx5: Add tracepoint for post send\")\nSigned-off-by: Yishai Hadas ","shortMessageHtmlLink":"mlx5: Fix the rdma_tracepoint() code"}},{"before":"62de4fdfa9444ca0088930467deccaa3b66c5129","after":"91b4ed8dd8460b9c547bde47c4ae6c57f73b61af","ref":"refs/heads/verbs_misc","pushedAt":"2023-09-27T10:24:08.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"yishaih","name":"Yishai Hadas","path":"/yishaih","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4038053?s=80&v=4"},"commit":{"message":"verbs: Add support for XDR speed in ibv_query_port\n\nPreviously we had 8 bit field to represent the link speed in query_port,\nso speeds that were represented by the 9th bit couldn't be reported.\n\nAdd new u32 field to be able to report speeds that are in the 9th bit or\nbeyond. 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Unlike the previous approach, which relied on the first freed WQE\nas the next post receive target, the new algorithm locates the nearest\navailable WQE (or contiguous chunk of WQEs if available) to the tail\nindex.\n\nA WQE is considered to be available when it's under SW ownership and is\nnot part of the SRQ queues (main/wait queue), in other words, it's not\nincluded in the linked lists extending from the queues' head to tail.\n\nIn the context of ODP, where a page-faulted WQE requires Kernel\nintervention to resolve and handle its addresses, a wait queue is used\nas a cooldown mechanism. This mechanism places such WQEs in a wait queue\n(or at the end of the main queue when a wait queue is unavailable),\ndelaying potential post-receives until they are properly handled.\n\nConsequently, in the presence of a page-faulted WQE, the SRQ LL is\npopulated with all available WQEs, regardless of their contiguity,\nreducing the risk of inadvertently overwriting a page-faulted WQE with a\nfuture post-SRQ receive operation.\n\nHere are some results from perftest traffic with max-wr size of 256 and\nmessage size of 4KB (1KB as the max MTU on UD) on a ConnectX-6 Dx device\n(results in Gb/sec):\n+------+---------+-----------+----------+----------------+\n| #QPs | QP Type | W/O SRQ | Prev SRQ | New SRQ |\n+------+---------+-----------+----------+----------------+\n| 10 | UD | 55.88 | 15.20 | 55.71 (+267%) |\n| 10 | RC | 92.58 | 60.67 | 79.85 (+31%) |\n| 5 | RC | 92.57 | 58.08 | 86.24 (+48%) |\n| 3 | RC | 92.57 | 59.33 | 91.94 (+55%) |\n+------+---------+-----------+----------+----------------+\n\nSigned-off-by: Edward Srouji \nSigned-off-by: Yishai Hadas ","shortMessageHtmlLink":"mlx5: Enhance SRQ performance"}},{"before":"5e221817dc1e27f448f4c0c9181eb5ff2581c182","after":"50122fbe13850ad86ee732b182a686e62077033b","ref":"refs/heads/mlx5_dr","pushedAt":"2023-07-19T15:58:53.000Z","pushType":"push","commitsCount":82,"pusher":{"login":"yishaih","name":"Yishai Hadas","path":"/yishaih","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4038053?s=80&v=4"},"commit":{"message":"mlx5: DR, Optimize args sending on QP while in multi QP\n\nIn multi QP delay the write of the args to the rule creating\nphase, on the same QP of the rule using the action, this way\nwe will save writing of the args on all the QPs when creating\nit while the multi QP feature is enabled.\n\nSigned-off-by: Hamdan Igbaria \nSigned-off-by: Alex Vesker \nSigned-off-by: Yishai Hadas ","shortMessageHtmlLink":"mlx5: DR, Optimize args sending on QP while in multi QP"}},{"before":"60541727f76bf7e8c044e30856dbfeb17bae66a1","after":"3ec6fb5c89676e823fef9b874ebc2184196eed42","ref":"refs/heads/mlx5_vfio","pushedAt":"2023-06-26T09:11:04.644Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"yishaih","name":"Yishai Hadas","path":"/yishaih","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4038053?s=80&v=4"},"commit":{"message":"mlx5: Refactor how mlx5_vfio_reg_mr calculate the iova page size\n\nCurrently for some virtual addresses mlx5_vfio_reg_mr returns very large\niova page size, which may not be supported. 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