Open Source Verilog Modules
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Updated
Jan 25, 2023 - Verilog
Open Source Verilog Modules
My ongoing practice verilog hdl codes.
A dump for my VHDL projects, because I want to have a better understanding of Verilog and also Logic circuits.
This project is to design a processor and memory in the digital system design course at university.
Digital circuit description to perform multiplication with data_path and control_path using verilog
This repository contains a series of Verilog codes for the course UE22CS251A (DDCO).
This project is done in Vivado in Verilog with hardware implementation and the project is optimized Schoolbook multiplier which is much faster than the traditional ones
Verilog programs in gate level, dataflow & behavioural modelling with testbenches written in intel FPGA tested with ModelSim simulator
Verilog code and testbench for 4-bit full adder
I am trying to develop my skills through daily practice and consistency.
simple system verilog example using an LFSR as the application
This repository contains a collection of small Verilog modules for various purposes.
Traffic Light Controller using Verilog done in Vivado
my library of different digital hardware circuit designs and logic
<轻松成为设计高手: VerilogHDL 实用精解> EDA 先锋工作室, 王诚, 吴继华 2012.6
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