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rv32im

Here are 9 public repositories matching this topic...

ultraembedded / riscv

RISC-V CPU Core (RV32IM)

asic cpu fpga verification verilog pipeline-processor risc-v rv32i verilator riscv-linux rv32im

Updated Sep 18, 2021
Verilog

ultraembedded / biriscv

32-bit Superscalar RISC-V CPU

linux asic cpu fpga verilog xilinx superscalar in-order risc-v branch-prediction coremark rv32i verilator riscv-linux rv32im artix-7 pipelined-processors

Updated Sep 18, 2021
Verilog

ultraembedded / riscv_sbc

A RISC-V SBC based around the LambdaConcept USB2Sniffer FPGA board.

linux usb logic-analyzer usb3 risc-v single-board-computers ddr3 rv32im usb3300 usb2

Updated May 10, 2020
Verilog

ultraembedded / minispartan6-audio

miniSpartan6+ (Spartan6) FPGA based MP3 Player

audio fpga verilog sd-card mp3player risc-v spartan6 rv32im verilog-project

Updated Sep 2, 2019
Verilog

cepdnaclk / e16-co502-RV32IM-pipeline-implementation-group1

The objective of this project was to design and implement a 5 stage pipeline CPU to support the RISC-V instruction architecture. This pipeline CPU supports the entire RV32IM ISA which contains 45 instructions. The designed pipeline CPU was implemented using behavioral modeling in verilogHDL and icarus Verilog was used compile and simulate. gtkWa…

pipeline verilog computer-architecture risc-v rv32im

Updated Oct 31, 2021
Verilog

filiparag / ftn-riscv-mcu

Softcore microcontroller with peripherals based on PicoRV32

c firmware vhdl verilog risc-v picorv32 optiboot stk500 rv32im max1000

Updated Sep 4, 2024
Verilog

saleh1204 / rv32im

RV32IM System-on-Chip (SoC)

fpga de2-115 rv32im

Updated Apr 8, 2022
Verilog

solomspd / RISC-V-CPU

RISC-V 5-stage pipeline RV32I implementation with forwarding in verilog with drivers to work on xilinx nexus a7 FPGA boards

fpga verilog risc-v xilinx-fpga rv32i rv32im

Updated Aug 22, 2022
Verilog

lazardjurovic / rv32im_zbb

Emulation, implementation and verification of RISC-V core with I,M and Zbb extensions

emulator verification verilog systemc uvm risc-v rv32im uvm-verification bitmanip

Updated Sep 27, 2024
Verilog

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