This project is a part of the report for my 7th semester program elective (EC-4152 Low Power VLSI Design).

USC EE577A/577B related codes

Do some simple conversions on Verilog files to make them compatible with HSpice

Digital Systems 1 & 2 + Digital Systems Laboratory 1 + Digital Electronics Circuit +Microprocessor Based and Embedded Design courses projects

A frequency divider implemented using true single-phase clock (TSPC).

Digital Electronic Circuits

This is a novel application of active analog circuits for computing the Cartesian coordinates of points ( targets ) in 2D and 3D space. Two anchors ( points ) are assumed available, with known coordinates. Optical or Infrared Angle-of-Arrival , AOA, (noisy) measurements from each anchor to the uknown target are assumed available.

UT VLSI CA1

Advanced Programming Project - Sharif University of Technology - Electrical Engineering Department

Hpice Projects including DRAM, SRAM, High-Frequency Divider and Manchester Adder.

2-to-1 Decoder implemented using cmos, pseudo-nmos and dynamic logic

Tanslate a TB model into Hcircuit Model (Spice Model) and manipulate it

This project demonstrates how to use python to analyze HSpice simulation data.

Multi-objective optimization based on sloping plate optimization algorithm called Multi-objective Inclined Planes system optimization algorithm (MOIPO) is presented in this link. The proposed method uses the concept of Pareto optimization to identify non-dominant positions and an external tank to maintain these positions.

Multiplier is one of the most important arithmetic unit in Microprocessors and DSPs and also a major source of power dissipation. Reducing the power dissipation of multipliers is a key to satisfy the overall power budget of various digital circuits and systems. The project elaborates the steps required to design array multiplier. The fundamental…

A parallel-prefix adder implemented using Ling’s transformation.

FuzzyIWO-Algorithm (Adaptive fuzzy optimisation algorithm)

A center of gravity defuzzifier implemented as an analog CMOS circuit

NTUEE IC Design 23Fall HW2

FuzzyMSFLA-Algorithm (Fuzzy adaptive optimisation method)