Stars
Random instruction generator for RISC-V processor verification
libXCam is a project for extended camera(not limited in camera) features and focus on image quality improvement and video analysis. There are lots features supported in image pre-processing, image …
Code for the paper "Language Models are Unsupervised Multitask Learners"
Bullet Physics SDK: real-time collision detection and multi-physics simulation for VR, games, visual effects, robotics, machine learning etc.
An educational resource to help anyone learn deep reinforcement learning.
PyTorch implementation of DQN, AC, ACER, A2C, A3C, PG, DDPG, TRPO, PPO, SAC, TD3 and ....
Scenarios, tutorials and demos for Autonomous Driving
COCO API - Dataset @ https://cocodataset.org/
Modularized Implementation of Deep RL Algorithms in PyTorch
The Caliko library is an implementation of the FABRIK inverse kinematics algorithm in Java.
The repository contains the design database and documentation for Electric Drives Demonstration Platform
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
A full-speed device-side USB peripheral core written in Verilog.
PANet for Instance Segmentation and Object Detection
Codes for paper "Mask Scoring R-CNN".
FPGA reference design for the the Swerv EH1 Core
Simple machine mode program to probe RISC-V control and status registers
This repository contains supplementary source code for the OpenMP(R) API Specification.
Deprecated, please go to https://github.com/riscv-mcu/hbird-sdk/
RISC-V CPU, simple 5-stage in-order pipeline, for low-end applications needing MMUs and some performance
RISC-V architecture concurrency model litmus tests
A formalization of the RVWMO (RISC-V) memory model
GDB Server for interacting with RISC-V models, boards and FPGAs
Embedded GDB server implementation for 8-bit AVR MCU