VUnit is a unit testing framework for VHDL/SystemVerilog

GPL v3 2D/3D graphics engine in verilog

UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of FPGA and ASIC – resulting also in significant quality improv…

Z80 CPU and Memory Module

Hardware/Software Co-design environment of a processor core for deterministic real time systems

core files for the MiST fpga

IEEE 754 floating point library in system-verilog and vhdl

FPU Double VHDL

Experimental CPU with software-defined instruction set.

Convergent Tech Monochrome NGEN to VGA FPGA Converter V2.00