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Issues list

Compilation error with the cosimulation example when verilator >= 5.004
#23 opened Mar 10, 2023 by mbty updated Mar 10, 2023
Potential optimization in the RISC-V example
#16 opened Aug 23, 2021 by mbty updated Sep 30, 2021
5
Multiplier correctness example
#17 opened Aug 30, 2021 by vaishnavi08 updated Sep 6, 2021
1
Avoidable stalling in the RISC-V example
#15 opened Jul 15, 2021 by mbty updated Aug 23, 2021
2
Different behavior in simulation and FPGA
#14 opened Jun 9, 2021 by mbty updated Jun 23, 2021
3
unit_t in ext_fn_t input generates invalid verliog
#11 opened Apr 26, 2021 by blaxill updated May 6, 2021
8
About the upcoming module system and Kôika's semantics
#10 opened Apr 23, 2021 by mbty updated Apr 26, 2021
1
Errors in examples/rv/MultiplierCorrectness.v
#7 opened Apr 13, 2021 by mbty updated Apr 14, 2021
2
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