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Update x/sys module to support Risc-V #2153

Merged
merged 1 commit into from
Jun 3, 2019
Merged

Update x/sys module to support Risc-V #2153

merged 1 commit into from
Jun 3, 2019

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carlosedp
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Updating projects using libraries that were recently updated to support Risc-V.

Go upstream work is tracked on: golang/go#27532

Risc-V software support tracker on https://github.com/carlosedp/riscv-bringup

@mislav
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mislav commented Jun 1, 2019

Thank you. I'm not familiar with Risc-V. What is the benefit for the hub end-user?

@carlosedp
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Hi @mislav, Risc-V is an open-source architecture that is gaining traction and having new software for it boosts it's popularity. There is already one board with a Risc-V SOC, the SiFive Unleashed and more will come.

I use Hub daily in place of git and developing on and for Risc-V with it improves my productivity.

@mislav
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mislav commented Jun 3, 2019

Thank you for the explanation!

If this helps you compile hub on this new architecture, then I'm all for it. I don't see how this could have adverse affect on other platforms.

@mislav mislav merged commit 58c4843 into mislav:master Jun 3, 2019
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2 participants