Add support for ABEL (Advanced Boolean Equation Language) truth table design description

[maehw]

"ABEL (Advanced Boolean Equation Language) allows you to enter behavior-like descriptions of a logic circuit. ABEL is an industry-standard hardware description language (HDL) that was developed by Data I/O Corporation for programmable logic devices (PLD). There are other hardware description languages such as VHDL and Verilog. ABEL is a simpler language than VHDL which is capable of describing systems of larger complexity.

ABEL can be used to describe the behavior of a system in a variety of forms, including logic equations, truth tables, and state diagrams using C-like statements. The ABEL compiler allows designs to be simulated and implemented into PLDs such as PALs, CPLDs and FPGAs."

https://web.archive.org/web/20071012234417/http:https://www.seas.upenn.edu/~ese201/abel/abel_primer.html#Truth

As mentioned on the tinytypeout Discord, it would be nice to support ABEL truth table syntax for inputs.

I would add a preprocessing stage that converts ABEL truth table syntax to the expected JSON format (see demo design progects).