Compress to the upper lanes

[alantudyk]

LUT-less AVX2 (pseudo-)code for i32:

const uint32_t mask = _mm256_movemask_epi8(v_reg),
                cnt = __builtin_popcount(mask),
     left_compacted = _pext_u32(0x76543210, mask),
    right_compacted = left_compacted << (32 - cnt);

[jan-wassenberg]

Hi, are you proposing adding a new op? One concern is that pext is super slow on older AMDs, hence we have been avoiding it.