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Line buffering #2
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Now that we have a solution that's proven to work on the actual hardware, upon creating a representative sim testcase, consider closing this issue. |
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Jul 10, 2024
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Overview:
In our project focused on transmitting images from a camera through an FPGA to a screen via HDMI, we encountered memory constraints when attempting to store entire frames. To address this, we implemented a line buffering approach, where a specialized debayer module was developed to store and process image data line by line. This issue aims to document the line buffering technique employed and its integration into the project.
Background:
Traditionally, frame buffering involves storing an entire frame of image data in memory before transmitting it to the display. However, due to memory limitations, this approach was not feasible for our application. Instead, we opted for line buffering, which involves storing and processing image data one line at a time. This not only reduces memory requirements but also facilitates real-time processing and transmission of images.
Line Buffer Implementation:
The line buffering mechanism consists of a dedicated module responsible for managing image data from the camera. This module operates as follows:
Objective:
This issue aims to address the FIFO overflow/underflow problem encountered during the line buffering implementation and propose potential solutions to mitigate its impact on image quality and stability.
Next Steps:
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