-
Notifications
You must be signed in to change notification settings - Fork 1.1k
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Question about RISCV cpu_start #11930
Comments
I don't understand your point. Maybe @lupyuen @xiaoxiang781216 or @tmedicci could have a better understanding, because they are more used to RISC-V than I. |
Hi @Giri2801 I believe you're referring to this in the RISC-V Privileged Spec (Page 47):
So far on the RISC-V Platforms supported by NuttX, WFI has been tested OK as a "Loop Forever" instruction. According to the spec, it's potentially possible that a Future RISC-V Platform might implement WFI as NOP, and affect the NuttX Implementation. Before we propose the change (and do Regression Test across all RISC-V Platforms), are you aware of any platforms that might already implement WFI as NOP? Thanks. |
Hi @xiaoxiang781216 and @tmedicci : It might be good to update the WFI code in NuttX. Right now we assume that WFI will loop forever, but it's possible that the behaviour will change for future RISC-V SoCs. We could follow the pattern used by Linux Boot Code, with WFI inside a Loop: arch/riscv/kernel/head.S
Why WFI inside a Loop? I suppose WFI might be good for reducing Power Consumption, for the SoCs that actually implement WFI as Loop Forever. For other SoCs, it will simply loop forever while consuming extra power. Thanks! |
Hi @lupyuen , I'm working in Shakti Microprocessor team, and our hardware team had recently changed the implementation of WFI to wait for 1024 cycles, and then go through. I had observed that Nuttx was not booting up after that, so just put in this query. Thanks for the quick response! |
@Giri2801 Your project sounds cool! Hope I understand you correctly:
Are we suggesting that we should use a Spin-Wait for the CPU to boot? Thanks! |
Amazing @Giri2801 !!!! Please submit support to Shakti microprocessor to mainline, this way more people in India could test it! |
@lupyuen Your step 5 alone is slightly different I guess. The next line is
https://github.com/apache/nuttx/blob/master/arch/risc-v/src/common/riscv_cpustart.c#L94. So this_task() will return valid thread block, if core 0 has initialized it properly. But core 0 initialization is complete only after the IPI is received. If we proceed before actually getting interrupt, this_task() returns invalid pointer, and I'm getting an access fault. Hence we need a loop here, because we need to wait till IPI comes to signal all initialization by core 0 is done. This is what I have understood, might not be fully right. @acassis Yes, we are working on submitting support for RISCV based Shakti Quadcore. |
Hi @xiaoxiang781216 and @tmedicci : Would you know how we can fix this? Thanks. |
Hi,
|
@Giri2801 Sorry I'm not so great at RISC-V Assembly, wonder if you could implement this in your fork of NuttX Kernel, and verify if it works? Thanks |
I think |
Since RISCV spec allows WFI to be implemented as a NOP, shouldn't asm("WFI"); be in a while loop, as is commonly done?
https://github.com/apache/nuttx/blob/master/arch/risc-v/src/common/riscv_cpustart.c#L78
The text was updated successfully, but these errors were encountered: