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Interrupt nesting #10057
Interrupt nesting #10057
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To simplify the interrupt handling in protected mode. Signed-off-by: wangming9 <[email protected]>
1、The process stack supports interrupt nesting, Execute in MSP; 2、The interrupt stack supports interrupt nesting; The thread mode use PSP, and the handle mode use MSP; 3、Adjust arm_doirq、exception_common implementation to meet interrupt nesting 4、Adjust the conditions for returning MSP and PSP; 5、remove setintstack,add arm_initialize_stack; Signed-off-by: wangming9 <[email protected]>
Signed-off-by: wangming9 <[email protected]>
To simplify the interrupt handling in protected mode. Signed-off-by: wangming9 <[email protected]>
Solve the dependency on ARMV6M when compiling tlsr8278adk80d:nsh. Signed-off-by: wangming9 <[email protected]>
1、The process stack supports interrupt nesting, Execute in MSP; 2、The interrupt stack supports interrupt nesting; The thread mode use PSP, and the handle mode use MSP; 3、Adjust arm_doirq、exception_common implementation to meet interrupt nesting 4、Adjust the conditions for returning MSP and PSP; 5、remove setintstack; Signed-off-by: wangming9 <[email protected]>
To simplify the interrupt handling in protected mode. Signed-off-by: wangming9 <[email protected]>
1、The process stack supports interrupt nesting, Execute in MSP; 2、The interrupt stack supports interrupt nesting; The thread mode use PSP, and the handle mode use MSP; 3、Adjust arm_doirq、exception_common implementation to meet interrupt nesting 4、Adjust the conditions for returning MSP and PSP; 5、remove setintstack; Signed-off-by: wangming9 <[email protected]>
The first time interrupt nesting occurs between REE and TEE, CURRENT_REGS needs to be set. If TEE nesting REE breaks, then EXC_RETURN.S=0,EXC_RETURN.ES=1; Conversely, EXC_RETURN.S=1,EXC_RETURN.ES=0; Interrupt nesting between TEE and REE can be determined based on the S and ES bits of EXC_RETURN. Only once nesting between TEE and REE is supported, and cyclic nesting between TEE and REE is not supported. Signed-off-by: wangming9 <[email protected]>
See Issue #1134 and Wiki https://cwiki.apache.org/confluence/display/NUTTX/Nested+Interrupts |
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This needs to be configurable. The majority of the system assumes code executable under interrupt is not interruptible. If this code comes in without the option to disable it, it will wreak havoc with existing systems.
@davids5 , before this patch, if user want to use zero latency interrupt, they have to:
as describe in https://cwiki.apache.org/confluence/display/NUTTX/High+Performance%2C+Zero+Latency+Interrupts This patch just make exception_common reenterable, so you don't write a new one. But the interruption doesn't happen util you configure some IRQs have higher priority than NVIC_SYSH_PRIORITY_DEFAULT, enable ARMV7M_USEBASEPRI and ARCH_HIPRI_INTERRUPT: |
ping @davids5, could you give the feedback about my explanation? |
@xiaoxiang781216 Thank you for the explanation. I should have realized that if any driver already had priorities not set properly, it would already cause crashes (IIRC @patacongo removed some of these inconsistent priorities years ago in the Kinetis arch) |
Yes, it crashes before, but it mayn't crash now if the driver doesn't call any OS API directly since exception_common is reenterable safe now. |
Summary
Provides interrupt nesting and zero-latency interrupt support for the ARM M core architecture, including: ARMV6-M ARMV7-M ARMV8-M
Impact
Interrupt exception for arm m core architecture
Testing
Validation enables different priority interrupts to be nested