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6 stars written in Verilog
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Various HDL (Verilog) IP Cores

Verilog 650 202 Updated Jul 1, 2021

RISC-V CPU, simple 3-stage pipeline, for low-end applications (e.g., embedded, IoT)

Verilog 299 47 Updated Jan 23, 2022

Build an NFC (RFID) card reader using FPGA and simple circuit instead of RFID-specfic chip. 用FPGA+分立器件电路搭建一个NFC(RFID)读卡器,不需要专门的RFID芯片。

Verilog 98 18 Updated Jan 26, 2024

Test code to talk from STM32 MCU over FSMC to SDRAM on ICE40 FPGA

Verilog 23 9 Updated Dec 19, 2016

FFT implementation using CORDIC algorithm written in Verilog.

Verilog 21 8 Updated Sep 6, 2018

This Simple UART Core is capable of simple serial port communication and can be used for FPGA beginners to develop the serial port driver on the development board.If you need to do driver developme…

Verilog 4 Updated Aug 19, 2020