Skip to content
View aksiksi's full-sized avatar
🏠
Working from home
🏠
Working from home
Block or Report

Block or report aksiksi

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Starred repositories

11 stars written in Verilog
Clear filter

PicoRV32 - A Size-Optimized RISC-V CPU

Verilog 2,956 736 Updated Jun 27, 2024

A small, light weight, RISC CPU soft core

Verilog 1,244 152 Updated Jul 1, 2024

MNT VA2000, an Open Source Amiga 2/3/4000 Graphics Card (Zorro II/III), written in Verilog

Verilog 993 76 Updated Dec 15, 2022

Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementation supports 128 and 256 bit keys.

Verilog 320 119 Updated Feb 8, 2023

The Easy 8-bit Processor

Verilog 181 20 Updated Jun 9, 2014

A single-wire bi-directional chip-to-chip interface for FPGAs

Verilog 111 14 Updated Jul 7, 2016

Spatial: "Specify Parameterized Accelerators Through Inordinately Abstract Language"

Verilog 99 12 Updated Nov 14, 2018

The Original Nintendo Gameboy in Verilog

Verilog 51 7 Updated Dec 12, 2014

Reference Hardware Implementations of Bit Extract/Deposit Instructions

Verilog 21 5 Updated Oct 31, 2017

Implementation of the CMAC keyed hash function using AES as block cipher.

Verilog 12 5 Updated Feb 15, 2023

Hardware implementation of the SNOW-V stream cipher.

Verilog 2 1 Updated Oct 8, 2020