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Yosys 0.47

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@mmicko mmicko released this 05 Nov 07:37
· 150 commits to main since this release
0.47
647d61d

Yosys 0.46 .. Yosys 0.47

  • Various

    • Added cxxopts library for handling command line arguments.
    • Added docs generation from cells help output.

  • New commands and options

    • Added "-json" option to "synth_xilinx" pass.
    • Added "-derive_luts" option to "cellmatch" pass.
    • Added "t:@" syntax to "select" pass.
    • Added "-list-mod" option to "select" pass.
    • Removed deprecated "qwp" pass.

  • Verific support

    • Initial state handling for VHDL assertions.

WARNING

String attributes now have a distinct implementation from bit vector attributes, leading to often significant savings in runtime memory usage with up to 30% observed in real world designs.

Since both are represented with RTLIL::Const , its interface was changed. The bits member has been removed. To access any attribute as a bit vector, use the bits() method instead, which returns a const iterator. To modify a Const, you can call std::vectorRTLIL::State& get_bits() which forces the implementation to a bit vector. To get the number of bits, use the new Const::size() method instead of bits.size().

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