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log-cbmem-libgrinit-qnct2.txt
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log-cbmem-libgrinit-qnct2.txt
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[NOTE ] coreboot-24.02-410-g86b145ad3efe-dirty Thu Apr 04 03:26:19 UTC 2024 x86_32 bootblock starting (log level: 7)...
[DEBUG] CPU: Genuine Intel(R) CPU 0000 @ 2.40GHz
[DEBUG] CPU: ID 906ea, Unknown, ucode: 000000f5
[DEBUG] CPU: AES supported, TXT supported, VT supported
[DEBUG] MCH: device id 3ec4 (rev 07) is Unknown
[DEBUG] PCH: device id a2ca (rev 00) is H310C
[DEBUG] IGD: device id 3e9b (rev 00) is Unknown
[DEBUG] FMAP: Found "FLASH" version 1.1 at 0x210000.
[DEBUG] FMAP: base = 0xff800000 size = 0x800000 #areas = 6
[DEBUG] FMAP: area COREBOOT found @ 210200 (6225408 bytes)
[INFO ] CBFS: mcache @0xfef21300 built for 20 files, used 0x430 of 0x4000 bytes
[INFO ] CBFS: Found 'fallback/romstage' @0x80 size 0xccb0 in mcache @0xfef2132c
[DEBUG] BS: bootblock times (exec / console): total (unknown) / 105 ms
[NOTE ] coreboot-24.02-410-g86b145ad3efe-dirty Thu Apr 04 03:26:19 UTC 2024 x86_32 romstage starting (log level: 7)...
[INFO ] POST: 0x00
[CRIT ] HECI: reset failed
[DEBUG] pm1_sts: 8101 pm1_en: 0100 pm1_cnt: 00001c00
[DEBUG] gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
[DEBUG] gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
[DEBUG] gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
[DEBUG] gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000
[DEBUG] TCO_STS: 0000 0000
[DEBUG] GEN_PMCON: e0840200 00001808
[DEBUG] GBLRST_CAUSE: 00000000 00000000
[DEBUG] prev_sleep_state 5 (S5)
[DEBUG] FMAP: area COREBOOT found @ 210200 (6225408 bytes)
[INFO ] CBFS: Found 'fspm.bin' @0xd3dc0 size 0x66000 in mcache @0xfef21564
[INFO ] POST: 0x34
[DEBUG] FMAP: area RW_MRC_CACHE found @ 200000 (65536 bytes)
[INFO ] No memory dimm at address A4
[DEBUG] SPD @ 0x50
[INFO ] SPD: module type is DDR4
[INFO ] SPD: module part number is 9905625-004.A03LF
[INFO ] SPD: banks 16, ranks 2, rows 15, columns 10, density 4096 Mb
[INFO ] SPD: device width 8 bits, bus width 64 bits
[INFO ] SPD: module size is 8192 MB (per channel)
[INFO ] POST: 0x36
[INFO ] POST: 0x92
[INFO ] POST: 0x98
[DEBUG] CBMEM:
[DEBUG] IMD: root @ 0x7afff000 254 entries.
[DEBUG] IMD: root @ 0x7affec00 62 entries.
[DEBUG] External stage cache:
[DEBUG] IMD: root @ 0x7b3ff000 254 entries.
[DEBUG] IMD: root @ 0x7b3fec00 62 entries.
[DEBUG] FMAP: area RW_MRC_CACHE found @ 200000 (65536 bytes)
[DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'.
[INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x800000
[DEBUG] MRC: 'RW_MRC_CACHE' does not need update.
[DEBUG] 1 DIMMs found
[DEBUG] SMM Memory Map
[DEBUG] SMRAM : 0x7b000000 0x800000
[DEBUG] Subregion 0: 0x7b000000 0x200000
[DEBUG] Subregion 1: 0x7b200000 0x200000
[DEBUG] Subregion 2: 0x7b400000 0x400000
[DEBUG] top_of_ram = 0x7b000000
[DEBUG] Normal boot
[INFO ] CBFS: Found 'fallback/postcar' @0x163140 size 0x5cbc in mcache @0xfef21600
[DEBUG] Loading module at 0x7abcf000 with entry 0x7abcf031. filesize: 0x5908 memsize: 0xbc58
[DEBUG] Processing 221 relocs. Offset value of 0x78bcf000
[DEBUG] BS: romstage times (exec / console): total (unknown) / 310 ms
[NOTE ] coreboot-24.02-410-g86b145ad3efe-dirty Thu Apr 04 03:26:19 UTC 2024 x86_32 postcar starting (log level: 7)...
[DEBUG] Normal boot
[DEBUG] FMAP: area COREBOOT found @ 210200 (6225408 bytes)
[INFO ] CBFS: Found 'fallback/ramstage' @0xa9f00 size 0x1e459 in mcache @0x7abdd10c
[DEBUG] Loading module at 0x7aa7d000 with entry 0x7aa7d000. filesize: 0x3d898 memsize: 0x150d30
[DEBUG] Processing 4512 relocs. Offset value of 0x76a7d000
[DEBUG] BS: postcar times (exec / console): total (unknown) / 61 ms
[NOTE ] coreboot-24.02-410-g86b145ad3efe-dirty Thu Apr 04 03:26:19 UTC 2024 x86_32 ramstage starting (log level: 7)...
[INFO ] POST: 0x39
[INFO ] POST: 0x6f
[DEBUG] Normal boot
[INFO ] POST: 0x70
[DEBUG] BS: BS_PRE_DEVICE run times (exec / console): 0 / 3 ms
[DEBUG] microcode: sig=0x906ea pf=0x20 revision=0xf5
[DEBUG] FMAP: area COREBOOT found @ 210200 (6225408 bytes)
[INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0xcdc0 size 0x9d000 in mcache @0x7abdd0ac
[DEBUG] Skip microcode update
[INFO ] CBFS: Found 'fsps.bin' @0x139e00 size 0x28feb in mcache @0x7abdd2a4
[DEBUG] Detected 6 core, 12 thread CPU.
[DEBUG] Setting up SMI for CPU
[DEBUG] IED base = 0x7b400000
[DEBUG] IED size = 0x00400000
[INFO ] Will perform SMM setup.
[INFO ] CPU: Genuine Intel(R) CPU 0000 @ 2.40GHz.
[INFO ] LAPIC 0x0 in XAPIC mode.
[DEBUG] CPU: APIC: 00 enabled
[DEBUG] CPU: APIC: 01 enabled
[DEBUG] CPU: APIC: 02 enabled
[DEBUG] CPU: APIC: 03 enabled
[DEBUG] CPU: APIC: 04 enabled
[DEBUG] CPU: APIC: 05 enabled
[DEBUG] CPU: APIC: 06 enabled
[DEBUG] CPU: APIC: 07 enabled
[DEBUG] CPU: APIC: 08 enabled
[DEBUG] CPU: APIC: 09 enabled
[DEBUG] CPU: APIC: 0a enabled
[DEBUG] CPU: APIC: 0b enabled
[DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
[DEBUG] Processing 16 relocs. Offset value of 0x00030000
[DEBUG] Attempting to start 11 APs
[DEBUG] Waiting for 10ms after sending INIT.
[DEBUG] Waiting for SIPI to complete...
[DEBUG] done.
[INFO ] LAPIC 0x1 in XAPIC mode.
[DEBUG] Waiting for SIPI to complete...
[DEBUG] done.
[INFO ] AP: slot 4 apic_id 1, MCU rev: 0x000000f5
[INFO ] LAPIC 0x8 in XAPIC mode.
[INFO ] LAPIC 0xa in XAPIC mode.
[INFO ] LAPIC 0xb in XAPIC mode.
[INFO ] AP: slot 11 apic_id a, MCU rev: 0x000000f5
[INFO ] AP: slot 9 apic_id b, MCU rev: 0x000000f5
[INFO ] LAPIC 0x2 in XAPIC mode.
[INFO ] LAPIC 0x3 in XAPIC mode.
[INFO ] AP: slot 1 apic_id 2, MCU rev: 0x000000f5
[INFO ] AP: slot 2 apic_id 3, MCU rev: 0x000000f5
[INFO ] LAPIC 0x7 in XAPIC mode.
[INFO ] LAPIC 0x6 in XAPIC mode.
[INFO ] AP: slot 10 apic_id 7, MCU rev: 0x000000f5
[INFO ] AP: slot 8 apic_id 6, MCU rev: 0x000000f5
[INFO ] LAPIC 0x4 in XAPIC mode.
[INFO ] LAPIC 0x5 in XAPIC mode.
[INFO ] AP: slot 3 apic_id 8, MCU rev: 0x000000f5
[INFO ] LAPIC 0x9 in XAPIC mode.
[INFO ] AP: slot 6 apic_id 4, MCU rev: 0x000000f5
[INFO ] AP: slot 7 apic_id 5, MCU rev: 0x000000f5
[INFO ] AP: slot 5 apic_id 9, MCU rev: 0x000000f5
[DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b0 memsize: 0x1b0
[DEBUG] Processing 9 relocs. Offset value of 0x00038000
[DEBUG] smm_module_setup_stub: stack_top = 0x7b006000
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000
[DEBUG] SMM Module: stub loaded at 38000. Will call 0x7aa9d366
[DEBUG] Installing permanent SMM handler to 0x7b000000
[DEBUG] HANDLER [0x7b1ff000-0x7b1ffdb8]
[DEBUG] CPU 0
[DEBUG] ss0 [0x7b1fec00-0x7b1ff000]
[DEBUG] stub0 [0x7b1f7000-0x7b1f71b0]
[DEBUG] CPU 1
[DEBUG] ss1 [0x7b1fe800-0x7b1fec00]
[DEBUG] stub1 [0x7b1f6c00-0x7b1f6db0]
[DEBUG] CPU 2
[DEBUG] ss2 [0x7b1fe400-0x7b1fe800]
[DEBUG] stub2 [0x7b1f6800-0x7b1f69b0]
[DEBUG] CPU 3
[DEBUG] ss3 [0x7b1fe000-0x7b1fe400]
[DEBUG] stub3 [0x7b1f6400-0x7b1f65b0]
[DEBUG] CPU 4
[DEBUG] ss4 [0x7b1fdc00-0x7b1fe000]
[DEBUG] stub4 [0x7b1f6000-0x7b1f61b0]
[DEBUG] CPU 5
[DEBUG] ss5 [0x7b1fd800-0x7b1fdc00]
[DEBUG] stub5 [0x7b1f5c00-0x7b1f5db0]
[DEBUG] CPU 6
[DEBUG] ss6 [0x7b1fd400-0x7b1fd800]
[DEBUG] stub6 [0x7b1f5800-0x7b1f59b0]
[DEBUG] CPU 7
[DEBUG] ss7 [0x7b1fd000-0x7b1fd400]
[DEBUG] stub7 [0x7b1f5400-0x7b1f55b0]
[DEBUG] CPU 8
[DEBUG] ss8 [0x7b1fcc00-0x7b1fd000]
[DEBUG] stub8 [0x7b1f5000-0x7b1f51b0]
[DEBUG] CPU 9
[DEBUG] ss9 [0x7b1fc800-0x7b1fcc00]
[DEBUG] stub9 [0x7b1f4c00-0x7b1f4db0]
[DEBUG] CPU 10
[DEBUG] ss10 [0x7b1fc400-0x7b1fc800]
[DEBUG] stub10 [0x7b1f4800-0x7b1f49b0]
[DEBUG] CPU 11
[DEBUG] ss11 [0x7b1fc000-0x7b1fc400]
[DEBUG] stub11 [0x7b1f4400-0x7b1f45b0]
[DEBUG] stacks [0x7b000000-0x7b006000]
[DEBUG] Loading module at 0x7b1ff000 with entry 0x7b1ff06d. filesize: 0xda8 memsize: 0xdb8
[DEBUG] Processing 81 relocs. Offset value of 0x7b1ff000
[DEBUG] Loading module at 0x7b1f7000 with entry 0x7b1f7000. filesize: 0x1b0 memsize: 0x1b0
[DEBUG] Processing 9 relocs. Offset value of 0x7b1f7000
[DEBUG] smm_module_setup_stub: stack_top = 0x7b006000
[DEBUG] smm_module_setup_stub: per cpu stack_size = 0x800
[DEBUG] smm_module_setup_stub: runtime.smm_size = 0x200000
[DEBUG] SMM Module: placing smm entry code at 7b1f6c00, cpu # 0x1
[DEBUG] SMM Module: placing smm entry code at 7b1f6800, cpu # 0x2
[DEBUG] SMM Module: placing smm entry code at 7b1f6400, cpu # 0x3
[DEBUG] SMM Module: placing smm entry code at 7b1f6000, cpu # 0x4
[DEBUG] SMM Module: placing smm entry code at 7b1f5c00, cpu # 0x5
[DEBUG] SMM Module: placing smm entry code at 7b1f5800, cpu # 0x6
[DEBUG] SMM Module: placing smm entry code at 7b1f5400, cpu # 0x7
[DEBUG] SMM Module: placing smm entry code at 7b1f5000, cpu # 0x8
[DEBUG] SMM Module: placing smm entry code at 7b1f4c00, cpu # 0x9
[DEBUG] SMM Module: placing smm entry code at 7b1f4800, cpu # 0xa
[DEBUG] SMM Module: placing smm entry code at 7b1f4400, cpu # 0xb
[DEBUG] SMM Module: stub loaded at 7b1f7000. Will call 0x7b1ff06d
[DEBUG] Clearing SMI status registers
[DEBUG] SMI_STS: PM1
[DEBUG] PM1_STS: WAK PWRBTN TMROF
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ef000, cpu = 0
[DEBUG] In relocation handler: CPU 0
[DEBUG] New SMBASE=0x7b1ef000 IEDBASE=0x7b400000
[DEBUG] Writing SMRR. base = 0x7b000006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ee000, cpu = 4
[DEBUG] In relocation handler: CPU 4
[DEBUG] New SMBASE=0x7b1ee000 IEDBASE=0x7b400000
[DEBUG] Relocation complete.
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1eec00, cpu = 1
[DEBUG] In relocation handler: CPU 1
[DEBUG] New SMBASE=0x7b1eec00 IEDBASE=0x7b400000
[DEBUG] Writing SMRR. base = 0x7b000006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ee800, cpu = 2
[DEBUG] In relocation handler: CPU 2
[DEBUG] New SMBASE=0x7b1ee800 IEDBASE=0x7b400000
[DEBUG] Relocation complete.
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ee400, cpu = 3
[DEBUG] In relocation handler: CPU 3
[DEBUG] New SMBASE=0x7b1ee400 IEDBASE=0x7b400000
[DEBUG] Writing SMRR. base = 0x7b000006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1edc00, cpu = 5
[DEBUG] In relocation handler: CPU 5
[DEBUG] New SMBASE=0x7b1edc00 IEDBASE=0x7b400000
[DEBUG] Relocation complete.
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ecc00, cpu = 9
[DEBUG] In relocation handler: CPU 9
[DEBUG] New SMBASE=0x7b1ecc00 IEDBASE=0x7b400000
[DEBUG] Relocation complete.
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ec400, cpu = 11
[DEBUG] In relocation handler: CPU 11
[DEBUG] New SMBASE=0x7b1ec400 IEDBASE=0x7b400000
[DEBUG] Writing SMRR. base = 0x7b000006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ed800, cpu = 6
[DEBUG] In relocation handler: CPU 6
[DEBUG] New SMBASE=0x7b1ed800 IEDBASE=0x7b400000
[DEBUG] Writing SMRR. base = 0x7b000006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ed400, cpu = 7
[DEBUG] In relocation handler: CPU 7
[DEBUG] New SMBASE=0x7b1ed400 IEDBASE=0x7b400000
[DEBUG] Relocation complete.
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ec800, cpu = 10
[DEBUG] In relocation handler: CPU 10
[DEBUG] New SMBASE=0x7b1ec800 IEDBASE=0x7b400000
[DEBUG] Relocation complete.
[INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b1ed000, cpu = 8
[DEBUG] In relocation handler: CPU 8
[DEBUG] New SMBASE=0x7b1ed000 IEDBASE=0x7b400000
[DEBUG] Writing SMRR. base = 0x7b000006, mask=0xff800800
[DEBUG] Relocation complete.
[INFO ] Initializing CPU #0
[DEBUG] CPU: vendor Intel device 906ea
[DEBUG] CPU: family 06, model 9e, stepping 0a
[DEBUG] Clearing out pending MCEs
[DEBUG] cpu: energy policy set to 6
[INFO ] Turbo is available but hidden
[INFO ] Turbo is available and visible
[DEBUG] Skip microcode update
[INFO ] CPU #0 initialized
[INFO ] Initializing CPU #4
[INFO ] Initializing CPU #10
[INFO ] Initializing CPU #8
[DEBUG] CPU: vendor Intel device 906ea
[DEBUG] CPU: family 06, model 9e, stepping 0a
[DEBUG] CPU: vendor Intel device 906ea
[DEBUG] CPU: family 06, model 9e, stepping 0a
[INFO ] Initializing CPU #1
[INFO ] Initializing CPU #2
[DEBUG] CPU: vendor Intel device 906ea
[DEBUG] CPU: family 06, model 9e, stepping 0a
[DEBUG] CPU: vendor Intel device 906ea
[DEBUG] CPU: family 06, model 9e, stepping 0a
[DEBUG] Clearing out pending MCEs
[DEBUG] Clearing out pending MCEs
[DEBUG] cpu: energy policy set to 6
[DEBUG] cpu: energy policy set to 6
[DEBUG] Skip microcode update
[INFO ] CPU #1 initialized
[DEBUG] Skip microcode update
[INFO ] CPU #2 initialized
[INFO ] Initializing CPU #3
[INFO ] Initializing CPU #5
[DEBUG] CPU: vendor Intel device 906ea
[DEBUG] CPU: family 06, model 9e, stepping 0a
[DEBUG] CPU: vendor Intel device 906ea
[DEBUG] CPU: family 06, model 9e, stepping 0a
[DEBUG] Clearing out pending MCEs
[DEBUG] Clearing out pending MCEs
[DEBUG] cpu: energy policy set to 6
[DEBUG] cpu: energy policy set to 6
[DEBUG] Skip microcode update
[INFO ] CPU #3 initialized
[DEBUG] Skip microcode update
[INFO ] CPU #5 initialized
[DEBUG] Clearing out pending MCEs
[DEBUG] Clearing out pending MCEs
[DEBUG] cpu: energy policy set to 6
[DEBUG] cpu: energy policy set to 6
[DEBUG] Skip microcode update
[INFO ] CPU #10 initialized
[DEBUG] Skip microcode update
[INFO ] CPU #8 initialized
[DEBUG] CPU: vendor Intel device 906ea
[DEBUG] CPU: family 06, model 9e, stepping 0a
[INFO ] Initializing CPU #11
[INFO ] Initializing CPU #9
[DEBUG] CPU: vendor Intel device 906ea
[DEBUG] CPU: family 06, model 9e, stepping 0a
[DEBUG] CPU: vendor Intel device 906ea
[DEBUG] CPU: family 06, model 9e, stepping 0a
[DEBUG] Clearing out pending MCEs
[DEBUG] Clearing out pending MCEs
[DEBUG] Clearing out pending MCEs
[DEBUG] cpu: energy policy set to 6
[DEBUG] cpu: energy policy set to 6
[DEBUG] Skip microcode update
[INFO ] CPU #9 initialized
[DEBUG] Skip microcode update
[INFO ] CPU #11 initialized
[INFO ] Initializing CPU #6
[INFO ] Initializing CPU #7
[DEBUG] CPU: vendor Intel device 906ea
[DEBUG] CPU: family 06, model 9e, stepping 0a
[DEBUG] CPU: vendor Intel device 906ea
[DEBUG] CPU: family 06, model 9e, stepping 0a
[DEBUG] Clearing out pending MCEs
[DEBUG] Clearing out pending MCEs
[DEBUG] cpu: energy policy set to 6
[DEBUG] cpu: energy policy set to 6
[DEBUG] Skip microcode update
[INFO ] CPU #6 initialized
[DEBUG] Skip microcode update
[INFO ] CPU #7 initialized
[DEBUG] cpu: energy policy set to 6
[DEBUG] Skip microcode update
[INFO ] CPU #4 initialized
[INFO ] bsp_do_flight_plan done after 1448 msecs.
[DEBUG] CPU: frequency set to 3600 MHz
[DEBUG] Enabling SMIs.
[DEBUG] Locking SMM.
[DEBUG] VMX status: enabled
[DEBUG] VMX status: enabled
[DEBUG] IA32_FEATURE_CONTROL status: locked
[DEBUG] VMX status: enabled
[DEBUG] VMX status: enabled
[DEBUG] IA32_FEATURE_CONTROL status: locked
[DEBUG] IA32_FEATURE_CONTROL status: locked
[DEBUG] IA32_FEATURE_CONTROL status: locked
[DEBUG] VMX status: enabled
[DEBUG] VMX status: enabled
[DEBUG] IA32_FEATURE_CONTROL status: locked
[DEBUG] IA32_FEATURE_CONTROL status: locked
[DEBUG] VMX status: enabled
[DEBUG] VMX status: enabled
[DEBUG] VMX status: enabled
[DEBUG] VMX status: enabled
[DEBUG] IA32_FEATURE_CONTROL status: locked
[DEBUG] IA32_FEATURE_CONTROL status: locked
[DEBUG] IA32_FEATURE_CONTROL status: locked
[DEBUG] IA32_FEATURE_CONTROL status: locked
[DEBUG] VMX status: enabled
[DEBUG] VMX status: enabled
[DEBUG] IA32_FEATURE_CONTROL status: locked
[DEBUG] IA32_FEATURE_CONTROL status: locked
[DEBUG] BS: BS_DEV_INIT_CHIPS entry times (exec / console): 987 / 773 ms
[INFO ] POST: 0x71
[ERROR] Unknown MCH (0x3ec4) in get_sku_icc_max
[ERROR] Unknown MCH (0x3ec4) in get_sku_ac_dc_loadline
[ERROR] Unknown MCH (0x3ec4) in get_sku_ac_dc_loadline
[ERROR] Unknown MCH (0x3ec4) in get_sku_icc_max
[ERROR] Unknown MCH (0x3ec4) in get_sku_ac_dc_loadline
[ERROR] Unknown MCH (0x3ec4) in get_sku_ac_dc_loadline
[ERROR] Unknown MCH (0x3ec4) in get_sku_icc_max
[ERROR] Unknown MCH (0x3ec4) in get_sku_ac_dc_loadline
[ERROR] Unknown MCH (0x3ec4) in get_sku_ac_dc_loadline
[ERROR] Unknown MCH (0x3ec4) in get_sku_icc_max
[ERROR] Unknown MCH (0x3ec4) in get_sku_ac_dc_loadline
[ERROR] Unknown MCH (0x3ec4) in get_sku_ac_dc_loadline
[INFO ] POST: 0x93
[INFO ] FSPS returned 0
[INFO ] POST: 0x99
[INFO ] ITSS IRQ Polarities Before:
[INFO ] IPC0: 0x00ff4000
[INFO ] IPC1: 0x00000007
[INFO ] IPC2: 0x00000000
[INFO ] IPC3: 0x00000000
[INFO ] ITSS IRQ Polarities After:
[INFO ] IPC0: 0x00ff4000
[INFO ] IPC1: 0x00000007
[INFO ] IPC2: 0x00000000
[INFO ] IPC3: 0x00000000
[INFO ] Found PCIe Root Port #5 at PCI: 00:1c.0.
[INFO ] Found PCIe Root Port #8 at PCI: 00:1c.7.
[INFO ] Found PCIe Root Port #9 at PCI: 00:1d.0.
[INFO ] Remapping PCIe Root Port #5 from PCI: 00:00:1c.4 to new function number 0.
[DEBUG] BS: BS_DEV_INIT_CHIPS run times (exec / console): 27 / 182 ms
[INFO ] POST: 0x72
[INFO ] Enumerating buses...
[DEBUG] Root Device scanning...
[DEBUG] DOMAIN: 00000000 enabled
[DEBUG] CPU_CLUSTER: 0 enabled
[DEBUG] DOMAIN: 00000000 scanning...
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 00
[INFO ] POST: 0x24
[DEBUG] PCI: 00:00:00.0 [8086/3ec4] enabled
[DEBUG] PCI: 00:00:01.0 subordinate bus PCI Express
[DEBUG] PCI: 00:00:01.0 [8086/1901] enabled
[DEBUG] PCI: 00:00:02.0 [8086/3e9b] enabled
[DEBUG] PCI: 00:00:14.0 [8086/a2af] enabled
[INFO ] PCI: Static device PCI: 00:00:16.0 not found, disabling it.
[DEBUG] PCI: 00:00:17.0 [8086/a282] enabled
[DEBUG] PCI: 00:00:1c.0 [8086/a294] enabled
[DEBUG] PCI: 00:00:1c.7 [8086/a297] enabled
[DEBUG] PCI: 00:00:1d.0 [8086/a298] enabled
[DEBUG] PCI: 00:00:1f.0 [8086/a2ca] enabled
[DEBUG] PCI: 00:00:1f.1 [8086/a2a0] enabled
[DEBUG] PCI: 00:00:1f.2 [0000/0000] hidden
[DEBUG] PCI: 00:00:1f.3 [8086/a2f0] enabled
[DEBUG] PCI: 00:00:1f.4 [8086/a2a3] enabled
[DEBUG] PCI: 00:00:1f.5 [8086/a2a4] enabled
[DEBUG] GPIO: 0 enabled
[WARN ] PCI: Leftover static devices:
[WARN ] PCI: 00:00:01.1
[WARN ] PCI: 00:00:01.2
[WARN ] PCI: 00:00:04.0
[WARN ] PCI: 00:00:05.0
[WARN ] PCI: 00:00:07.0
[WARN ] PCI: 00:00:08.0
[WARN ] PCI: 00:00:13.0
[WARN ] PCI: 00:00:14.1
[WARN ] PCI: 00:00:14.2
[WARN ] PCI: 00:00:14.3
[WARN ] PCI: 00:00:15.0
[WARN ] PCI: 00:00:15.1
[WARN ] PCI: 00:00:15.2
[WARN ] PCI: 00:00:15.3
[WARN ] PCI: 00:00:16.0
[WARN ] PCI: 00:00:16.1
[WARN ] PCI: 00:00:16.2
[WARN ] PCI: 00:00:16.3
[WARN ] PCI: 00:00:16.4
[WARN ] PCI: 00:00:19.0
[WARN ] PCI: 00:00:19.1
[WARN ] PCI: 00:00:19.2
[WARN ] PCI: 00:00:1e.0
[WARN ] PCI: 00:00:1e.1
[WARN ] PCI: 00:00:1e.2
[WARN ] PCI: 00:00:1e.3
[WARN ] PCI: 00:00:1e.4
[WARN ] PCI: 00:00:1e.5
[WARN ] PCI: 00:00:1e.6
[WARN ] PCI: 00:00:1f.6
[WARN ] PCI: 00:00:1f.7
[WARN ] PCI: Check your devicetree.cb.
[DEBUG] PCI: 00:00:01.0 scanning...
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 01
[INFO ] POST: 0x24
[INFO ] POST: 0x25
[INFO ] PCI: 00:00:01.0: Setting Max_Payload_Size to 256 for devices under this root port
[DEBUG] scan_bus: bus PCI: 00:00:01.0 finished in 26 msecs
[DEBUG] PCI: 00:00:02.0 scanning...
[DEBUG] scan_bus: bus PCI: 00:00:02.0 finished in 0 msecs
[DEBUG] PCI: 00:00:14.0 scanning...
[DEBUG] scan_bus: bus PCI: 00:00:14.0 finished in 0 msecs
[DEBUG] PCI: 00:00:1c.0 scanning...
[DEBUG] PCI: 00:00:1c.0: No LTR support
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 02
[INFO ] POST: 0x24
[DEBUG] PCI: 00:02:00.0 [10ec/8168] enabled
[INFO ] POST: 0x25
[INFO ] PCIe: Common Clock Configuration already enabled
[INFO ] ASPM: Enabled L1
[INFO ] PCI: 00:00:1c.0: Setting Max_Payload_Size to 128 for devices under this root port
[DEBUG] scan_bus: bus PCI: 00:00:1c.0 finished in 51 msecs
[DEBUG] PCI: 00:00:1c.7 scanning...
[DEBUG] PCI: 00:00:1c.7: No LTR support
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 03
[INFO ] POST: 0x24
[INFO ] POST: 0x25
[INFO ] PCI: 00:00:1c.7: Setting Max_Payload_Size to 128 for devices under this root port
[DEBUG] scan_bus: bus PCI: 00:00:1c.7 finished in 32 msecs
[DEBUG] PCI: 00:00:1d.0 scanning...
[DEBUG] PCI: 00:00:1d.0: No LTR support
[DEBUG] PCI: pci_scan_bus for segment group 00 bus 04
[INFO ] POST: 0x24
[INFO ] POST: 0x25
[INFO ] PCI: 00:00:1d.0: Setting Max_Payload_Size to 128 for devices under this root port
[DEBUG] scan_bus: bus PCI: 00:00:1d.0 finished in 32 msecs
[DEBUG] PCI: 00:00:1f.0 scanning...
[DEBUG] PNP: 002e.0 disabled
[DEBUG] PNP: 002e.1 enabled
[DEBUG] PNP: 002e.4 enabled
[DEBUG] PNP: 002e.5 disabled
[DEBUG] PNP: 002e.6 disabled
[DEBUG] PNP: 002e.7 enabled
[DEBUG] PNP: 002e.a disabled
[DEBUG] PNP: 0c31.0 enabled
[DEBUG] scan_bus: bus PCI: 00:00:1f.0 finished in 37 msecs
[DEBUG] PCI: 00:00:1f.2 scanning...
[DEBUG] scan_bus: bus PCI: 00:00:1f.2 finished in 0 msecs
[DEBUG] PCI: 00:00:1f.3 scanning...
[DEBUG] scan_bus: bus PCI: 00:00:1f.3 finished in 0 msecs
[DEBUG] PCI: 00:00:1f.4 scanning...
[DEBUG] scan_bus: bus PCI: 00:00:1f.4 finished in 0 msecs
[INFO ] POST: 0x25
[DEBUG] scan_bus: bus DOMAIN: 00000000 finished in 592 msecs
[DEBUG] scan_bus: bus Root Device finished in 616 msecs
[INFO ] done
[DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 2 / 639 ms
[INFO ] MRC: Could not find region 'UNIFIED_MRC_CACHE'
[DEBUG] FMAP: area RW_MRC_CACHE found @ 200000 (65536 bytes)
[INFO ] MRC: NOT enabling PRR for 'RW_MRC_CACHE'.
[DEBUG] BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 24 ms
[INFO ] POST: 0x73
[DEBUG] found VGA at PCI: 00:00:02.0
[DEBUG] Setting up VGA for PCI: 00:00:02.0
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000
[DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
[INFO ] Allocating resources...
[INFO ] Reading resources...
[DEBUG] SA MMIO resource: PCIEXBAR -> base = 0xe0000000, size = 0x10000000
[DEBUG] SA MMIO resource: MCHBAR -> base = 0xfed10000, size = 0x00008000
[DEBUG] SA MMIO resource: DMIBAR -> base = 0xfed18000, size = 0x00001000
[DEBUG] SA MMIO resource: EPBAR -> base = 0xfed19000, size = 0x00001000
[DEBUG] SA MMIO resource: GDXCBAR -> base = 0xfed84000, size = 0x00001000
[DEBUG] SA MMIO resource: EDRAMBAR -> base = 0xfed80000, size = 0x00004000
[DEBUG] SA MMIO resource: GFXVTBAR -> base = 0xfed90000, size = 0x00001000
[DEBUG] SA MMIO resource: VTVC0BAR -> base = 0xfed91000, size = 0x00001000
[INFO ] Available memory above 4GB: 6144M
[INFO ] Done reading resources.
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 1 (relative placement) ===
[DEBUG] PCI: 00:00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG] PCI: 00:02:00.0 10 * [0x0 - 0xff] io
[DEBUG] PCI: 00:00:1c.0 io: size: 1000 align: 12 gran: 12 limit: ffff done
[DEBUG] PCI: 00:00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG] PCI: 00:02:00.0 20 * [0x0 - 0x3fff] mem
[DEBUG] PCI: 00:02:00.0 18 * [0x4000 - 0x4fff] mem
[DEBUG] PCI: 00:00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG] PCI: 00:00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG] PCI: 00:00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[INFO ] === Resource allocator: DOMAIN: 00000000 - Pass 2 (allocating resources) ===
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 00 base 00000000 limit 00000fff io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 84 base 00000200 limit 000002ff io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 88 base 00000a00 limit 00000a7f io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 8c base 000003e0 limit 000003ef io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.0 90 base 000002e0 limit 000002ff io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 002e.1 60 base 000003f8 limit 000003ff io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 002e.4 60 base 00000a30 limit 00000a37 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 002e.4 62 base 00000a20 limit 00000a27 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 002e.7 60 base 00000000 limit 00000003 io (fixed)
[DEBUG] avoid_fixed_resources: PNP: 002e.7 62 base 00000a00 limit 00000a07 io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.2 40 base 00001800 limit 000018ff io (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
[INFO ] DOMAIN: 00000000: Resource ranges:
[INFO ] * Base: 1000, Size: 800, Tag: 100
[INFO ] * Base: 1900, Size: d6a0, Tag: 100
[INFO ] * Base: efc0, Size: 1040, Tag: 100
[DEBUG] PCI: 00:00:1c.0 1c * [0xf000 - 0xffff] limit: ffff io
[DEBUG] PCI: 00:00:02.0 20 * [0xefc0 - 0xefff] limit: efff io
[DEBUG] PCI: 00:00:17.0 20 * [0xef80 - 0xef9f] limit: ef9f io
[DEBUG] PCI: 00:00:17.0 18 * [0xef78 - 0xef7f] limit: ef7f io
[DEBUG] PCI: 00:00:17.0 1c * [0xef74 - 0xef77] limit: ef77 io
[DEBUG] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
[DEBUG] DOMAIN: 00000000 mem: base: 7b000000 size: 0 align: 0 gran: 0 limit: dfffffff
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 00 base e0000000 limit efffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 01 base fed10000 limit fed17fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 02 base fed18000 limit fed18fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 03 base fed19000 limit fed19fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 04 base fed84000 limit fed84fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 05 base fed80000 limit fed83fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 06 base fed90000 limit fed90fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 07 base fed91000 limit fed91fff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 08 base 00000000 limit 0009ffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 09 base 000c0000 limit 7affffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0a base 7b000000 limit 7fffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0b base 100000000 limit 27fffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0c base 000a0000 limit 000bffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:00.0 0d base 000c0000 limit 000fffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.1 10 base fd000000 limit fdffffff mem (fixed)
[DEBUG] avoid_fixed_resources: PCI: 00:00:1f.2 48 base fe000000 limit fe00ffff mem (fixed)
[INFO ] DOMAIN: 00000000: Resource ranges:
[INFO ] * Base: 80000000, Size: 60000000, Tag: 200
[INFO ] * Base: 280000000, Size: 7d80000000, Tag: 200
[DEBUG] PCI: 00:00:02.0 18 * [0xd0000000 - 0xdfffffff] limit: dfffffff prefmem
[DEBUG] PCI: 00:00:02.0 10 * [0xcf000000 - 0xcfffffff] limit: cfffffff mem
[DEBUG] PCI: 00:00:1c.0 20 * [0xcef00000 - 0xceffffff] limit: ceffffff mem
[DEBUG] PCI: 00:00:14.0 10 * [0xceef0000 - 0xceefffff] limit: ceefffff mem
[DEBUG] PCI: 00:00:1f.3 20 * [0xceee0000 - 0xceeeffff] limit: ceeeffff mem
[DEBUG] PCI: 00:00:1f.2 10 * [0xceedc000 - 0xceedffff] limit: ceedffff mem
[DEBUG] PCI: 00:00:1f.3 10 * [0xceed8000 - 0xceedbfff] limit: ceedbfff mem
[DEBUG] PCI: 00:00:17.0 10 * [0xceed6000 - 0xceed7fff] limit: ceed7fff mem
[DEBUG] PCI: 00:00:1f.5 10 * [0xceed5000 - 0xceed5fff] limit: ceed5fff mem
[DEBUG] PCI: 00:00:17.0 24 * [0xceed4000 - 0xceed47ff] limit: ceed47ff mem
[DEBUG] PCI: 00:00:17.0 14 * [0xceed3000 - 0xceed30ff] limit: ceed30ff mem
[DEBUG] PCI: 00:00:1f.4 10 * [0xceed2000 - 0xceed20ff] limit: ceed20ff mem
[DEBUG] DOMAIN: 00000000 mem: base: 7b000000 size: 0 align: 0 gran: 0 limit: dfffffff done
[DEBUG] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: 7fffffffff done
[DEBUG] PCI: 00:02:00.0 10 * [0xf000 - 0xf0ff] limit: f0ff io
[DEBUG] PCI: 00:02:00.0 18 * [0xcef04000 - 0xcef04fff] limit: cef04fff mem
[DEBUG] PCI: 00:02:00.0 20 * [0xcef00000 - 0xcef03fff] limit: cef03fff mem
[INFO ] === Resource allocator: DOMAIN: 00000000 - resource allocation complete ===
[DEBUG] PCI: 00:00:01.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 buio
[DEBUG] PCI: 00:00:01.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 buprefmem
[DEBUG] PCI: 00:00:01.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bumem
[DEBUG] PCI: 00:00:02.0 10 <- [0x00000000cf000000 - 0x00000000cfffffff] size 0x01000000 gran 0x18 mem64
[DEBUG] PCI: 00:00:02.0 18 <- [0x00000000d0000000 - 0x00000000dfffffff] size 0x10000000 gran 0x1c prefmem64
[DEBUG] PCI: 00:00:02.0 20 <- [0x000000000000efc0 - 0x000000000000efff] size 0x00000040 gran 0x06 io
[DEBUG] PCI: 00:00:14.0 10 <- [0x00000000ceef0000 - 0x00000000ceefffff] size 0x00010000 gran 0x10 mem64
[DEBUG] PCI: 00:00:17.0 10 <- [0x00000000ceed6000 - 0x00000000ceed7fff] size 0x00002000 gran 0x0d mem
[DEBUG] PCI: 00:00:17.0 14 <- [0x00000000ceed3000 - 0x00000000ceed30ff] size 0x00000100 gran 0x08 mem
[DEBUG] PCI: 00:00:17.0 18 <- [0x000000000000ef78 - 0x000000000000ef7f] size 0x00000008 gran 0x03 io
[DEBUG] PCI: 00:00:17.0 1c <- [0x000000000000ef74 - 0x000000000000ef77] size 0x00000004 gran 0x02 io
[DEBUG] PCI: 00:00:17.0 20 <- [0x000000000000ef80 - 0x000000000000ef9f] size 0x00000020 gran 0x05 io
[DEBUG] PCI: 00:00:17.0 24 <- [0x00000000ceed4000 - 0x00000000ceed47ff] size 0x00000800 gran 0x0b mem
[DEBUG] PCI: 00:00:1c.0 1c <- [0x000000000000f000 - 0x000000000000ffff] size 0x00001000 gran 0x0c seg 00 buio
[DEBUG] PCI: 00:00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 buprefmem
[DEBUG] PCI: 00:00:1c.0 20 <- [0x00000000cef00000 - 0x00000000ceffffff] size 0x00100000 gran 0x14 seg 00 bumem
[DEBUG] PCI: 00:02:00.0 10 <- [0x000000000000f000 - 0x000000000000f0ff] size 0x00000100 gran 0x08 io
[DEBUG] PCI: 00:02:00.0 18 <- [0x00000000cef04000 - 0x00000000cef04fff] size 0x00001000 gran 0x0c mem64
[DEBUG] PCI: 00:02:00.0 20 <- [0x00000000cef00000 - 0x00000000cef03fff] size 0x00004000 gran 0x0e mem64
[DEBUG] PCI: 00:00:1c.7 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 buio
[DEBUG] PCI: 00:00:1c.7 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 buprefmem
[DEBUG] PCI: 00:00:1c.7 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bumem
[DEBUG] PCI: 00:00:1d.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 buio
[DEBUG] PCI: 00:00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 seg 00 buprefmem
[DEBUG] PCI: 00:00:1d.0 20 <- [0x00000000ffffffff - 0x00000000fffffffe] size 0x00000000 gran 0x14 seg 00 bumem
[DEBUG] PNP: 002e.1 60 <- [0x00000000000003f8 - 0x00000000000003ff] size 0x00000008 gran 0x03 io
[DEBUG] PNP: 002e.1 70 <- [0x0000000000000004 - 0x0000000000000004] size 0x00000001 gran 0x00 irq
[NOTE ] PNP: 002e.1 f0 irq size: 0x0000000001 not assigned in devicetree
[DEBUG] PNP: 002e.4 60 <- [0x0000000000000a30 - 0x0000000000000a37] size 0x00000008 gran 0x03 io
[DEBUG] PNP: 002e.4 62 <- [0x0000000000000a20 - 0x0000000000000a27] size 0x00000008 gran 0x03 io
[DEBUG] PNP: 002e.4 70 <- [0x0000000000000000 - 0x0000000000000000] size 0x00000001 gran 0x00 irq
[DEBUG] PNP: 002e.7 60 <- [0x0000000000000000 - 0x0000000000000003] size 0x00000004 gran 0x02 io
[DEBUG] PNP: 002e.7 62 <- [0x0000000000000a00 - 0x0000000000000a07] size 0x00000008 gran 0x03 io
[DEBUG] PNP: 002e.7 70 <- [0x0000000000000000 - 0x0000000000000000] size 0x00000001 gran 0x00 irq
[DEBUG] PNP: 002e.7 71 <- [0x0000000000000001 - 0x0000000000000000] size 0x00000000 gran 0x00 irq
[DEBUG] LPC: enabling default decode range LPC_IOE_COMA_EN
[ERROR] LPC: Cannot open IO window: a30 size 8
[ERROR] No more IO windows
[ERROR] LPC: Cannot open IO window: a20 size 8
[ERROR] No more IO windows
[ERROR] LPC IO decode base 0!
[ERROR] LPC: Cannot open IO window: a00 size 8
[ERROR] No more IO windows
[DEBUG] PCI: 00:00:1f.2 10 <- [0x00000000ceedc000 - 0x00000000ceedffff] size 0x00004000 gran 0x0e mem
[DEBUG] PCI: 00:00:1f.3 10 <- [0x00000000ceed8000 - 0x00000000ceedbfff] size 0x00004000 gran 0x0e mem64
[DEBUG] PCI: 00:00:1f.3 20 <- [0x00000000ceee0000 - 0x00000000ceeeffff] size 0x00010000 gran 0x10 mem64
[DEBUG] PCI: 00:00:1f.4 10 <- [0x00000000ceed2000 - 0x00000000ceed20ff] size 0x00000100 gran 0x08 mem64
[DEBUG] PCI: 00:00:1f.5 10 <- [0x00000000ceed5000 - 0x00000000ceed5fff] size 0x00001000 gran 0x0c mem
[INFO ] Done setting resources.
[INFO ] Done allocating resources.
[DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 3 / 1522 ms
[INFO ] POST: 0x94
[INFO ] POST: 0xa2
[DEBUG] BS: BS_DEV_ENABLE entry times (exec / console): 0 / 7 ms
[INFO ] POST: 0x74
[INFO ] Enabling resources...
[DEBUG] PCI: 00:00:00.0 subsystem <- 8086/3ec4
[DEBUG] PCI: 00:00:00.0 cmd <- 06
[DEBUG] PCI: 00:00:01.0 bridge ctrl <- 0013
[DEBUG] PCI: 00:00:01.0 cmd <- 00
[DEBUG] PCI: 00:00:02.0 subsystem <- 8086/3e9b
[DEBUG] PCI: 00:00:02.0 cmd <- 03
[DEBUG] PCI: 00:00:14.0 subsystem <- 8086/a2af
[DEBUG] PCI: 00:00:14.0 cmd <- 02
[DEBUG] PCI: 00:00:17.0 subsystem <- 8086/a282
[DEBUG] PCI: 00:00:17.0 cmd <- 03
[DEBUG] PCI: 00:00:1c.0 bridge ctrl <- 0013
[DEBUG] PCI: 00:00:1c.0 subsystem <- 8086/a294
[DEBUG] PCI: 00:00:1c.0 cmd <- 07
[DEBUG] PCI: 00:00:1c.7 bridge ctrl <- 0013
[DEBUG] PCI: 00:00:1c.7 subsystem <- 8086/a297
[DEBUG] PCI: 00:00:1c.7 cmd <- 00
[DEBUG] PCI: 00:00:1d.0 bridge ctrl <- 0013
[DEBUG] PCI: 00:00:1d.0 subsystem <- 8086/a298
[DEBUG] PCI: 00:00:1d.0 cmd <- 00
[DEBUG] PCI: 00:00:1f.0 subsystem <- 8086/a2ca
[DEBUG] PCI: 00:00:1f.0 cmd <- 07
[DEBUG] PCI: 00:00:1f.2 subsystem <- 8086/a2a1
[DEBUG] PCI: 00:00:1f.2 cmd <- 06
[DEBUG] PCI: 00:00:1f.3 subsystem <- 8086/a2f0
[DEBUG] PCI: 00:00:1f.3 cmd <- 02
[DEBUG] PCI: 00:00:1f.4 subsystem <- 8086/a2a3
[DEBUG] PCI: 00:00:1f.4 cmd <- 03
[DEBUG] PCI: 00:00:1f.5 subsystem <- 8086/a2a4
[DEBUG] PCI: 00:00:1f.5 cmd <- 406
[DEBUG] PCI: 00:02:00.0 cmd <- 03
[INFO ] done.
[DEBUG] BS: BS_DEV_ENABLE run times (exec / console): 0 / 194 ms
[WARN ] HECI: CSE device 16.0 is disabled
[DEBUG] ME: Version: Unavailable
[DEBUG] BS: BS_DEV_ENABLE exit times (exec / console): 0 / 12 ms
[INFO ] POST: 0x75
[INFO ] Initializing devices...
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:00.0 init
[INFO ] CPU TDP = 45 Watts
[INFO ] CPU PL1 = 45 Watts
[INFO ] CPU PL2 = 65 Watts
[DEBUG] PCI: 00:00:00.0 init finished in 14 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:02.0 init
[INFO ] CBFS: Found 'vbt.bin' @0xd3800 size 0x47a in mcache @0x7abdd234
[INFO ] Found a VBT of 4608 bytes
[INFO ] GMA: Found VBT in CBFS
[INFO ] GMA: Found valid VBT in CBFS
[DEBUG] PCI: 00:00:02.0 init finished in 26 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:14.0 init
[DEBUG] PCI: 00:00:14.0 init finished in 0 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1c.0 init
[DEBUG] Initializing PCH PCIe bridge.
[DEBUG] PCI: 00:00:1c.0 init finished in 5 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1c.7 init
[DEBUG] Initializing PCH PCIe bridge.
[DEBUG] PCI: 00:00:1c.7 init finished in 5 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1d.0 init
[DEBUG] Initializing PCH PCIe bridge.
[DEBUG] PCI: 00:00:1d.0 init finished in 5 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1f.0 init
[DEBUG] IOAPIC: Initializing IOAPIC at fec00000
[DEBUG] IOAPIC: ID = 0x00
[DEBUG] IOAPIC: 120 interrupts
[DEBUG] IOAPIC: Clearing IOAPIC at fec00000
[DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00
[DEBUG] PCI: 00:00:1f.0 init finished in 36 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1f.2 init
[DEBUG] RTC Init
[INFO ] Set power on after power failure.
[DEBUG] apm_control: Disabling ACPI.
[DEBUG] APMC done.
[DEBUG] Disabling Deep S3
[DEBUG] Disabling Deep S3
[DEBUG] Disabling Deep S4
[DEBUG] Disabling Deep S4
[DEBUG] Disabling Deep S5
[DEBUG] Disabling Deep S5
[DEBUG] PCI: 00:00:1f.2 init finished in 53 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1f.3 init
[DEBUG] PCI: 00:00:1f.3 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1f.4 init
[DEBUG] PCI: 00:00:1f.4 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:00:1f.5 init
[DEBUG] PCI: 00:00:1f.5 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] PCI: 00:02:00.0 init
[DEBUG] PCI: 00:02:00.0 init finished in 0 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PNP: 002e.1 init
[DEBUG] PNP: 002e.1 init finished in 0 msecs
[INFO ] POST: 0x75
[DEBUG] PNP: 002e.4 init
[DEBUG] PNP: 002e.4 init finished in 0 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[DEBUG] PNP: 002e.7 init
[DEBUG] PNP: 002e.7 init finished in 0 msecs
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] POST: 0x75
[INFO ] Devices initialized
[DEBUG] BS: BS_DEV_INIT run times (exec / console): 3 / 503 ms
[INFO ] POST: 0x76
[INFO ] Finalize devices...
[DEBUG] PCI: 00:00:02.0 final
[DEBUG] PCI: 00:00:17.0 final
[DEBUG] PCI: 00:00:1f.2 final
[DEBUG] PCI: 00:00:1f.4 final
[INFO ] Devices finalized
[DEBUG] BS: BS_POST_DEVICE run times (exec / console): 0 / 38 ms
[INFO ] POST: 0x77
[DEBUG] BS: BS_OS_RESUME_CHECK run times (exec / console): 0 / 4 ms
[INFO ] POST: 0x79
[INFO ] POST: 0x9c
[INFO ] CBFS: Found 'fallback/dsdt.aml' @0xd0a00 size 0x2db7 in mcache @0x7abdd208
[WARN ] CBFS: 'fallback/slic' not found.
[INFO ] ACPI: Writing ACPI tables at 7aa0e000.
[DEBUG] ACPI: * FACS
[DEBUG] SCI is IRQ 9, GSI 9
[DEBUG] ACPI: * FACP
[DEBUG] ACPI: added table 1/32, length now 44
[DEBUG] PCI space above 4GB MMIO is at 0x280000000, len = 0x7d80000000
[DEBUG] Found 1 CPU(s) with 6/12 physical/logical core(s) each.
[DEBUG] PSS: 2401MHz power 45000 control 0x2400 status 0x2400
[DEBUG] PSS: 2400MHz power 45000 control 0x1800 status 0x1800
[DEBUG] PSS: 2300MHz power 42592 control 0x1700 status 0x1700
[DEBUG] PSS: 2000MHz power 35760 control 0x1400 status 0x1400
[DEBUG] PSS: 1700MHz power 29343 control 0x1100 status 0x1100
[DEBUG] PSS: 1400MHz power 23322 control 0xe00 status 0xe00
[DEBUG] PSS: 1100MHz power 17662 control 0xb00 status 0xb00
[DEBUG] PSS: 800MHz power 12377 control 0x800 status 0x800
[DEBUG] PSS: 2401MHz power 45000 control 0x2400 status 0x2400
[DEBUG] PSS: 2400MHz power 45000 control 0x1800 status 0x1800
[DEBUG] PSS: 2300MHz power 42592 control 0x1700 status 0x1700
[DEBUG] PSS: 2000MHz power 35760 control 0x1400 status 0x1400
[DEBUG] PSS: 1700MHz power 29343 control 0x1100 status 0x1100
[DEBUG] PSS: 1400MHz power 23322 control 0xe00 status 0xe00
[DEBUG] PSS: 1100MHz power 17662 control 0xb00 status 0xb00
[DEBUG] PSS: 800MHz power 12377 control 0x800 status 0x800
[DEBUG] PSS: 2401MHz power 45000 control 0x2400 status 0x2400
[DEBUG] PSS: 2400MHz power 45000 control 0x1800 status 0x1800
[DEBUG] PSS: 2300MHz power 42592 control 0x1700 status 0x1700
[DEBUG] PSS: 2000MHz power 35760 control 0x1400 status 0x1400
[DEBUG] PSS: 1700MHz power 29343 control 0x1100 status 0x1100
[DEBUG] PSS: 1400MHz power 23322 control 0xe00 status 0xe00
[DEBUG] PSS: 1100MHz power 17662 control 0xb00 status 0xb00
[DEBUG] PSS: 800MHz power 12377 control 0x800 status 0x800
[DEBUG] PSS: 2401MHz power 45000 control 0x2400 status 0x2400
[DEBUG] PSS: 2400MHz power 45000 control 0x1800 status 0x1800
[DEBUG] PSS: 2300MHz power 42592 control 0x1700 status 0x1700
[DEBUG] PSS: 2000MHz power 35760 control 0x1400 status 0x1400
[DEBUG] PSS: 1700MHz power 29343 control 0x1100 status 0x1100
[DEBUG] PSS: 1400MHz power 23322 control 0xe00 status 0xe00
[DEBUG] PSS: 1100MHz power 17662 control 0xb00 status 0xb00
[DEBUG] PSS: 800MHz power 12377 control 0x800 status 0x800
[DEBUG] PSS: 2401MHz power 45000 control 0x2400 status 0x2400
[DEBUG] PSS: 2400MHz power 45000 control 0x1800 status 0x1800
[DEBUG] PSS: 2300MHz power 42592 control 0x1700 status 0x1700
[DEBUG] PSS: 2000MHz power 35760 control 0x1400 status 0x1400
[DEBUG] PSS: 1700MHz power 29343 control 0x1100 status 0x1100
[DEBUG] PSS: 1400MHz power 23322 control 0xe00 status 0xe00
[DEBUG] PSS: 1100MHz power 17662 control 0xb00 status 0xb00
[DEBUG] PSS: 800MHz power 12377 control 0x800 status 0x800
[DEBUG] PSS: 2401MHz power 45000 control 0x2400 status 0x2400
[DEBUG] PSS: 2400MHz power 45000 control 0x1800 status 0x1800
[DEBUG] PSS: 2300MHz power 42592 control 0x1700 status 0x1700
[DEBUG] PSS: 2000MHz power 35760 control 0x1400 status 0x1400
[DEBUG] PSS: 1700MHz power 29343 control 0x1100 status 0x1100
[DEBUG] PSS: 1400MHz power 23322 control 0xe00 status 0xe00
[DEBUG] PSS: 1100MHz power 17662 control 0xb00 status 0xb00
[DEBUG] PSS: 800MHz power 12377 control 0x800 status 0x800
[DEBUG] PSS: 2401MHz power 45000 control 0x2400 status 0x2400
[DEBUG] PSS: 2400MHz power 45000 control 0x1800 status 0x1800
[DEBUG] PSS: 2300MHz power 42592 control 0x1700 status 0x1700
[DEBUG] PSS: 2000MHz power 35760 control 0x1400 status 0x1400
[DEBUG] PSS: 1700MHz power 29343 control 0x1100 status 0x1100
[DEBUG] PSS: 1400MHz power 23322 control 0xe00 status 0xe00
[DEBUG] PSS: 1100MHz power 17662 control 0xb00 status 0xb00
[DEBUG] PSS: 800MHz power 12377 control 0x800 status 0x800
[DEBUG] PSS: 2401MHz power 45000 control 0x2400 status 0x2400
[DEBUG] PSS: 2400MHz power 45000 control 0x1800 status 0x1800
[DEBUG] PSS: 2300MHz power 42592 control 0x1700 status 0x1700
[DEBUG] PSS: 2000MHz power 35760 control 0x1400 status 0x1400
[DEBUG] PSS: 1700MHz power 29343 control 0x1100 status 0x1100
[DEBUG] PSS: 1400MHz power 23322 control 0xe00 status 0xe00
[DEBUG] PSS: 1100MHz power 17662 control 0xb00 status 0xb00
[DEBUG] PSS: 800MHz power 12377 control 0x800 status 0x800
[DEBUG] PSS: 2401MHz power 45000 control 0x2400 status 0x2400
[DEBUG] PSS: 2400MHz power 45000 control 0x1800 status 0x1800
[DEBUG] PSS: 2300MHz power 42592 control 0x1700 status 0x1700
[DEBUG] PSS: 2000MHz power 35760 control 0x1400 status 0x1400
[DEBUG] PSS: 1700MHz power 29343 control 0x1100 status 0x1100
[DEBUG] PSS: 1400MHz power 23322 control 0xe00 status 0xe00
[DEBUG] PSS: 1100MHz power 17662 control 0xb00 status 0xb00
[DEBUG] PSS: 800MHz power 12377 control 0x800 status 0x800
[DEBUG] PSS: 2401MHz power 45000 control 0x2400 status 0x2400
[DEBUG] PSS: 2400MHz power 45000 control 0x1800 status 0x1800
[DEBUG] PSS: 2300MHz power 42592 control 0x1700 status 0x1700
[DEBUG] PSS: 2000MHz power 35760 control 0x1400 status 0x1400
[DEBUG] PSS: 1700MHz power 29343 control 0x1100 status 0x1100
[DEBUG] PSS: 1400MHz power 23322 control 0xe00 status 0xe00
[DEBUG] PSS: 1100MHz power 17662 control 0xb00 status 0xb00
[DEBUG] PSS: 800MHz power 12377 control 0x800 status 0x800
[DEBUG] PSS: 2401MHz power 45000 control 0x2400 status 0x2400
[DEBUG] PSS: 2400MHz power 45000 control 0x1800 status 0x1800
[DEBUG] PSS: 2300MHz power 42592 control 0x1700 status 0x1700
[DEBUG] PSS: 2000MHz power 35760 control 0x1400 status 0x1400
[DEBUG] PSS: 1700MHz power 29343 control 0x1100 status 0x1100
[DEBUG] PSS: 1400MHz power 23322 control 0xe00 status 0xe00
[DEBUG] PSS: 1100MHz power 17662 control 0xb00 status 0xb00
[DEBUG] PSS: 800MHz power 12377 control 0x800 status 0x800
[DEBUG] PSS: 2401MHz power 45000 control 0x2400 status 0x2400
[DEBUG] PSS: 2400MHz power 45000 control 0x1800 status 0x1800
[DEBUG] PSS: 2300MHz power 42592 control 0x1700 status 0x1700
[DEBUG] PSS: 2000MHz power 35760 control 0x1400 status 0x1400
[DEBUG] PSS: 1700MHz power 29343 control 0x1100 status 0x1100
[DEBUG] PSS: 1400MHz power 23322 control 0xe00 status 0xe00
[DEBUG] PSS: 1100MHz power 17662 control 0xb00 status 0xb00
[DEBUG] PSS: 800MHz power 12377 control 0x800 status 0x800
[DEBUG] Empty min sleep state array returned
[INFO ] Returning default LPI constraint package
[INFO ] \_SB.PCI0.PEPD: Intel Power Engine Plug-in
[DEBUG] ACPI: * SSDT
[DEBUG] ACPI: added table 2/32, length now 52
[DEBUG] ACPI: * MCFG
[DEBUG] ACPI: added table 3/32, length now 60
[DEBUG] ACPI: * LPIT
[DEBUG] ACPI: added table 4/32, length now 68
[DEBUG] IOAPIC: 120 interrupts
[DEBUG] SCI is IRQ 9, GSI 9
[DEBUG] ACPI: * APIC
[DEBUG] ACPI: added table 5/32, length now 76
[DEBUG] ACPI: * SPCR
[DEBUG] ACPI: added table 6/32, length now 84
[DEBUG] current = 7aa13270
[DEBUG] ACPI: * DMAR
[DEBUG] ACPI: added table 7/32, length now 92
[DEBUG] acpi_write_dbg2_pci_uart: Device not found
[DEBUG] ACPI: * HPET
[DEBUG] ACPI: added table 8/32, length now 100
[INFO ] ACPI: done.
[DEBUG] ACPI tables: 21312 bytes.
[DEBUG] smbios_write_tables: 7aa06000
[DEBUG] SMBIOS firmware version is set to coreboot_version: '24.02-410-g86b145ad3efe-dirty'
[INFO ] Create SMBIOS type 16
[INFO ] Create SMBIOS type 17
[INFO ] Create SMBIOS type 20
[DEBUG] SMBIOS tables: 813 bytes.
[DEBUG] Writing table forward entry at 0x00000500
[DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 653b
[DEBUG] Writing coreboot table at 0x7aa32000
[DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
[DEBUG] 1. 0000000000001000-000000000009ffff: RAM
[DEBUG] 2. 00000000000a0000-00000000000fffff: RESERVED
[DEBUG] 3. 0000000000100000-000000007aa05fff: RAM
[DEBUG] 4. 000000007aa06000-000000007aa7cfff: CONFIGURATION TABLES
[DEBUG] 5. 000000007aa7d000-000000007abcdfff: RAMSTAGE
[DEBUG] 6. 000000007abce000-000000007affffff: CONFIGURATION TABLES
[DEBUG] 7. 000000007b000000-000000007fffffff: RESERVED
[DEBUG] 8. 00000000e0000000-00000000efffffff: RESERVED
[DEBUG] 9. 00000000fd000000-00000000fe00ffff: RESERVED
[DEBUG] 10. 00000000fed10000-00000000fed19fff: RESERVED
[DEBUG] 11. 00000000fed80000-00000000fed84fff: RESERVED
[DEBUG] 12. 00000000fed90000-00000000fed91fff: RESERVED
[DEBUG] 13. 0000000100000000-000000027fffffff: RAM
[INFO ] SF: Detected 00 0000 with sector size 0x1000, total 0x800000
[DEBUG] Wrote coreboot table at: 0x7aa32000, 0x470 bytes, checksum cb22
[DEBUG] coreboot table: 1160 bytes.
[DEBUG] IMD ROOT 0. 0x7afff000 0x00001000
[DEBUG] IMD SMALL 1. 0x7affe000 0x00001000
[DEBUG] FSP MEMORY 2. 0x7abfe000 0x00400000
[DEBUG] CONSOLE 3. 0x7abde000 0x00020000
[DEBUG] RO MCACHE 4. 0x7abdd000 0x00000430
[DEBUG] TIME STAMP 5. 0x7abdc000 0x00000910
[DEBUG] MEM INFO 6. 0x7abdb000 0x00000f48
[DEBUG] AFTER CAR 7. 0x7abce000 0x0000d000
[DEBUG] RAMSTAGE 8. 0x7aa7c000 0x00152000
[DEBUG] REFCODE 9. 0x7aa4e000 0x0002e000
[DEBUG] SMM BACKUP 10. 0x7aa3e000 0x00010000
[DEBUG] IGD OPREGION11. 0x7aa3a000 0x00003161
[DEBUG] COREBOOT 12. 0x7aa32000 0x00008000
[DEBUG] ACPI 13. 0x7aa0e000 0x00024000
[DEBUG] SMBIOS 14. 0x7aa06000 0x00008000
[DEBUG] IMD small region:
[DEBUG] IMD ROOT 0. 0x7affec00 0x00000400
[DEBUG] FSP RUNTIME 1. 0x7affebe0 0x00000004
[DEBUG] FMAP 2. 0x7affeaa0 0x00000134
[DEBUG] POWER STATE 3. 0x7affea60 0x00000040
[DEBUG] FSPM VERSION 4. 0x7affea40 0x00000004
[DEBUG] ROMSTAGE 5. 0x7affea20 0x00000004
[DEBUG] ROMSTG STCK 6. 0x7affe960 0x000000a8