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147 stars written in Arduino
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The simplest, fastest repository for training/finetuning medium-sized GPTs.

Python 37,405 5,956 Updated Aug 19, 2024

Generative Models by Stability AI

Python 24,640 2,740 Updated Sep 4, 2024

Use ChatGPT to summarize the arXiv papers. 全流程加速科研,利用chatgpt进行论文全文总结+专业翻译+润色+审稿+审稿回复

Python 18,495 1,936 Updated Apr 4, 2024

开发者边车,github打不开,github加速,git clone加速,git release下载加速,stackoverflow加速

JavaScript 15,538 1,824 Updated Nov 18, 2024

OCRmyPDF adds an OCR text layer to scanned PDF files, allowing them to be searched

Python 14,153 1,017 Updated Nov 18, 2024

AISystem 主要是指AI系统,包括AI芯片、AI编译器、AI推理和训练框架等AI全栈底层技术

Jupyter Notebook 11,206 1,627 Updated Oct 26, 2024

在线制作`sorry 为所欲为`的gif

CSS 6,450 788 Updated Apr 11, 2023

我设计的一个HDMI转MIPI模块,可以用于驱动各种手机屏幕当显示器用。

C 5,815 870 Updated Sep 10, 2023

Digital logic design tool and simulator

Java 4,950 642 Updated Nov 18, 2024

帮助大家进行FPGA的入门,分享FPGA相关的优秀文章,优秀项目

4,041 669 Updated May 15, 2022

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

C 3,882 658 Updated Nov 4, 2024

Yosys Open SYnthesis Suite

C++ 3,494 894 Updated Nov 19, 2024

Insane(ly slow but wicked good) PNG image optimization

Python 3,361 147 Updated Jun 18, 2022

PicoRV32 - A Size-Optimized RISC-V CPU

Verilog 3,150 759 Updated Jun 27, 2024

Icarus Verilog

C++ 2,863 530 Updated Nov 15, 2024

Linux内核与设备驱动程序学习笔记

C 2,581 868 Updated Nov 2, 2024

Learning FPGA, yosys, nextpnr, and RISC-V

C++ 2,577 246 Updated May 11, 2024

Verilog Ethernet components for FPGA implementation

Verilog 2,313 706 Updated Jul 18, 2024

cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

Python 1,812 512 Updated Nov 19, 2024

文章《Functional Programming For The Rest of Us》的中文翻译

1,794 278 Updated Oct 13, 2021

Must-have verilog systemverilog modules

Verilog 1,653 380 Updated Nov 7, 2024

New generation entropy codecs : Finite State Entropy and Huff0

C 1,340 144 Updated Mar 21, 2024

毛泽东选集

1,324 392 Updated Feb 5, 2022

An OpenCL-based FPGA Accelerator for Convolutional Neural Networks

C 1,254 369 Updated Feb 14, 2022

A Verilog synthesis flow for Minecraft redstone circuits

SystemVerilog 1,136 25 Updated Nov 25, 2020

Verilog to Routing -- Open Source CAD Flow for FPGA Research

C++ 1,017 393 Updated Nov 18, 2024

Hardware Description Languages

969 95 Updated Aug 18, 2024

Bluespec Compiler (BSC)

Haskell 955 146 Updated Nov 18, 2024

清华大学计算机学科推荐学术会议和期刊列表

PHP 924 112 Updated Oct 12, 2023

你还在为有刷电机的高噪声、低响应速度和低寿命而烦恼吗?这个项目是一个20块钱就能搞定的FOC无刷电机控制方案!This project is a FOC (Field Oriented Control) BLDC Motor control scheme that can be done for 3$!

C++ 838 241 Updated Nov 17, 2023
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