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Nx_WebServer application description

This application provides an example of Azure RTOS NetX Duo stack usage on STM32H735G-DK board, it shows how to develop Web HTTP server based application. The application is designed to load files and dyncamic web pages stored in SD card using a Web HTTP server, the code provides all required features to build a compliant Web HTTP Server. The main entry function tx_application_define() is called by ThreadX during kernel start, at this stage, all NetX and FileX resources are created.

  • A NX_PACKET_POOL NxAppPool is allocated
  • A NX_IP instance NetXDuoEthIpInstance using that pool is initialized
  • A NX_PACKET_POOL WebServerPool is allocated
  • A NX_WEB_HTTP_SERVER HTTPServer instance using that pool is initialized
  • The ARP, ICMP and protocols (TCP and UDP) are enabled for the NX_IP instance
  • A DHCP client is created.

The application then creates 2 threads with different priorities:

  • NxAppThread (priority 10, PreemtionThreashold 10) : created with the TX_AUTO_START flag to start automatically.
  • AppServerThread (priority 5, PreemtionThreashold 5) : created with the TX_DONT_START flag to be started later.
  • LedThread (priority 15, PreemtionThreashold 15) : created with the TX_DONT_START flag to be started later.

The NxAppThread starts and performs the following actions:

  • Starts the DHCP client
  • Waits for the IP address resolution
  • Resumes the AppServerThread

The AppServerThread, once started:

  • Fx_media_open.
  • Starts HTTP server.
  • Each command coming from client (browser) is treated on the callback webserver_request_notify_callback.

The LedThread, once resumed from the dashboard:

  • Green LED is toggling & message is printed on HyperTerminal.

Expected success behavior

  • The board IP address "IP@" is printed on the HyperTerminal
  • Home page is well displayed on the browser after entering the url: http:https://IP@/about.html
  • Dashboard is well displayed on the browser after entering the url: http:https://IP@/dashboard.html
  • On dashboard, You can command green LED and watch some infos about threadx and netxduo.

Error behaviors

If the WEB HTTP server is not successfully started, the green LED stays OFF and the red LED toggles every 1 second. In case of other errors, the Web HTTP server does not operate as designed (Files stored in the SD card are not loaded in the web browser).

Assumptions if any

The uSD card must be plugged before starting the application. The board must be in a DHCP Ethernet network.

Known limitations

Hotplug is not implemented for this example, that is, the SD card is expected to be inserted before application running.

Notes

  1. Some code parts can be executed in the ITCM-RAM (64 KB up to 256kB) which decreases critical task execution time, compared to code execution from Flash memory. This feature can be activated using '#pragma location = ".itcmram"' to be placed above function declaration, or using the toolchain GUI (file options) to execute a whole source file in the ITCM-RAM.
  2. If the application is using the DTCM/ITCM memories (@0x20000000/ 0x0000000: not cacheable and only accessible by the Cortex M7 and the MDMA), no need for cache maintenance when the Cortex M7 and the MDMA access these RAMs. If the application needs to use DMA (or other masters) based access or requires more RAM, then the user has to:
    • Use a non TCM SRAM. (example : D1 AXI-SRAM @ 0x24000000).
    • Add a cache maintenance mechanism to ensure the cache coherence between CPU and other masters (DMAs,DMA2D,LTDC,MDMA).
    • The addresses and the size of cacheable buffers (shared between CPU and other masters) must be properly defined to be aligned to L1-CACHE line size (32 bytes).
  3. It is recommended to enable the cache and maintain its coherence:
    • Depending on the use case it is also possible to configure the cache attributes using the MPU.
    • Please refer to the AN4838 "Managing memory protection unit (MPU) in STM32 MCUs".
    • Please refer to the AN4839 "Level 1 cache on STM32F7 and STM32H7 Series"

ThreadX usage hints

  • ThreadX uses the Systick as time base, thus it is mandatory that the HAL uses a separate time base through the TIM IPs.

  • ThreadX is configured with 100 ticks/sec by default, this should be taken into account when using delays or timeouts at application. It is always possible to reconfigure it, by updating the "TX_TIMER_TICKS_PER_SECOND" define in the "tx_user.h" file. The update should be reflected in "tx_initialize_low_level.S" file too.

  • ThreadX is disabling all interrupts during kernel start-up to avoid any unexpected behavior, therefore all system related calls (HAL, BSP) should be done either at the beginning of the application or inside the thread entry functions.

  • ThreadX offers the "tx_application_define()" function, that is automatically called by the tx_kernel_enter() API. It is highly recommended to use it to create all applications ThreadX related resources (threads, semaphores, memory pools...) but it should not in any way contain a system API call (HAL or BSP).

  • Using dynamic memory allocation requires to apply some changes to the linker file. ThreadX needs to pass a pointer to the first free memory location in RAM to the tx_application_define() function, using the "first_unused_memory" argument. This requires changes in the linker files to expose this memory location.

    • For EWARM add the following section into the .icf file:
    place in RAM_region    { last section FREE_MEM };
    • For MDK-ARM:
    either define the RW_IRAM1 region in the ".sct" file
or modify the line below in "tx_initialize_low_level.S to match the memory region being used
    LDR r1, =|Image$$RW_IRAM1$$ZI$$Limit|
    • For STM32CubeIDE add the following section into the .ld file:
    ._threadx_heap :
  {
     . = ALIGN(8);
     __RAM_segment_used_end__ = .;
     . = . + 64K;
     . = ALIGN(8);
   } >RAM_D1 AT> RAM_D1

    The simplest way to provide memory for ThreadX is to define a new section, see ._threadx_heap above.
In the example above the ThreadX heap size is set to 64KBytes.
The ._threadx_heap must be located between the .bss and the ._user_heap_stack sections in the linker script.
Caution: Make sure that ThreadX does not need more than the provided heap memory (64KBytes in this example).
Read more in STM32CubeIDE User Guide, chapter: "Linker script".
    • The "tx_initialize_low_level.S" should be also modified to enable the "USE_DYNAMIC_MEMORY_ALLOCATION" flag.

FileX/LevelX usage hints

  • FileX SD driver is using the DMA, thus the DTCM (0x20000000) memory should not be used by the application, as it is not accessible by the SD DMA.
  • When calling the fx_media_format() API, it is highly recommended to understand all the parameters used by the API to correctly generate a valid filesystem.
  • FileX is using data buffers, passed as arguments to fx_media_open(), fx_media_read() and fx_media_write() APIs, it is recommended that these buffers are multiple of sector size and "32 bytes" aligned to avoid cache maintenance issues.

NetX Duo usage hints

  • The ETH TX And RX descriptors are accessed by the CPU and the ETH DMA IP, thus they should not be allocated into the DTCM RAM "0x20000000".
  • Make sure to allocate them into a "Non-Cacheable" memory region to always ensure data coherency between the CPU and ETH DMA.
  • Depending on the application scenario, the total TX and RX descriptors may need to be increased by updating respectively the "ETH_TX_DESC_CNT" and "ETH_RX_DESC_CNT" in the "stm32h7xx_hal_conf.h", to guarantee the application's correct behavior, but this will cost extra memory to allocate.
  • The NetXDuo application needs to allocate the NX_PACKET pool in a dedicated section that is configured as either "Cacheable Write-through" for STM32H72XX and STM32H73XX , STM32H7AXX and STM32H7BXX or non-cacheable for other STM32H7 families. Below is an example of the section declaration for different IDEs.
    • For EWARM ".icf" file
    define symbol __ICFEDIT_region_NXDATA_start__  = 0x24030100;
define symbol __ICFEDIT_region_NXDATA_end__   = 0x240340FF;
define region NXApp_region  = mem:[from __ICFEDIT_region_NXDATA_start__ to __ICFEDIT_region_NXDATA_end__];
place in NXApp_region { section .NetXPoolSection};
    • For MDK-ARM
    RW_NXServerPoolSection 0x24030100 0x2000  {
*(.NxServerPoolSection)
}

RW_NXDriverSection 0x24034100 0x1F000  {
*(.NetXPoolSection)
}
    • For STM32CubeIDE ".ld" file

.nx_data 0x24030100 (NOLOAD): { . = ABSOLUTE(0x24030100); *(.NxServerPoolSection)

. = ABSOLUTE(0x24034100);
*(.NetXPoolSection)

} >RAM_D1 AT >FLASH


This section is then used in the <code> app_azure_rtos.c</code> file to force the <code>nx_byte_pool_buffer</code> allocation.

/* USER CODE BEGIN NX_Pool_Buffer */

#if defined ( ICCARM ) /* IAR Compiler */ #pragma location = ".NetXPoolSection"

#elif defined ( __CC_ARM ) || defined(__ARMCC_VERSION) /* ARM Compiler 5/6 */ attribute((section(".NetXPoolSection")))

#elif defined ( GNUC ) /* GNU Compiler */ attribute((section(".NetXPoolSection"))) #endif

/* USER CODE END NX_Pool_Buffer */ static UCHAR nx_byte_pool_buffer[NX_APP_MEM_POOL_SIZE]; static TX_BYTE_POOL nx_app_byte_pool;

For more details about the MPU configuration please refer to the [AN4838](https://www.st.com/resource/en/application_note/dm00272912-managing-memory-protection-unit-in-stm32-mcus-stmicroelectronics.pdf)

### <b>Keywords</b>

RTOS, ThreadX, Network, NetxDuo, Web HTTP Server, FileX, File ,SDMMC, UART

### <b>Hardware and Software environment</b>

  - This application runs on STM32H735xx devices.
  - This application has been tested with STMicroelectronics STM32H735G-DK boards revision: MB1520-H735I-B02
    and can be easily tailored to any other supported device and development board.
  - This application uses USART3 to display logs, the hyperterminal configuration is as follows:
      - BaudRate = 115200 baud
      - Word Length = 8 Bits
      - Stop Bit = 1
      - Parity = None
      - Flow control = None

### <b>How to use it ?</b>

In order to make the program work, you must do the following :

 - Open your preferred toolchain
 - Rebuild all files and load your image into target memory
 - Run the application