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USRP 2974 FPGA Not discoverable in Vivado Over JTAG #388
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Tracking issue on internal bug repo
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Did the Digilent drivers install successfully (see Redirecting to Support for assistance. |
michael-west
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Tracking issue on internal bug repo
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Oct 14, 2020
Tracking this issue internally. User is working with R&D to resolve. |
Thanks @michael-west for the comments here. |
@NIDvoez FYI. |
We have the same problem--was there any resolution? Thanks. |
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Issue Description
The X3x0 of USRP 2974 is not discoverable in Vivado 2015.4/2019.1. But appears in lsusb as FTDI.
Setup Details
The block diagram of USRP 2974https://kb.ettus.com/File:2974_blk_dia_hiLevel_v01.png suggests that the SoM (host) has a USB2.0 connected with FPGA JTAG. In order to program the FPGA directly, I made following changed to the device:
Expected Behavior
The X3x0 FPGA (Kintex7) should be discoverable in Vivado automatically.
Actual Behaviour
Despite all the dependencies installed, the FPGA is not discoverable.
Steps to reproduce the problem
As given above in the setup details. The same steps were followed by my clients on another 2974 machine. They gave exact same results.
Additional Information
NA
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