Commits

Commits on Nov 20, 2023

Add CI
NBruschi
committedNov 20, 2023

Commits on Nov 2, 2023

Fix for Issue openhwgroup#77
Mary Bennett
committedNov 2, 2023
Rename bitmanip constraints
Mary Bennett
committedNov 2, 2023
Exclude CORE-V memory tests for compressed code generation.

jeremybennett
authored and
MaryBennett
committedNov 2, 2023

Commits on Oct 30, 2023

Change test for cv.setupi to cv.setup
Mary Bennett
committedOct 30, 2023
Fix doloop_begin_i curr_insn_transform failure.

amylaar
authored and
MaryBennett
committedOct 30, 2023
Fix doloop_align placement issues.

amylaar
authored and
MaryBennett
committedOct 30, 2023
doloop_end_range_check: Check for falling off end of insn chain.

amylaar
authored and
MaryBennett
committedOct 30, 2023
Fix pass_riscv_doloop_ranges::execute to loop for a doloop_end_i pattern that definest he end label.

amylaar
authored and
MaryBennett
committedOct 30, 2023
CORE_V HW loops: Check label ranges and select instructions accordingly.

amylaar
authored and
MaryBennett
committedOct 30, 2023

Commits on Oct 26, 2023

backport CORE-V HW loop.

amylaar
authored and
MaryBennett
committedOct 26, 2023

Commits on Oct 13, 2023

Fix mem_plus_reg predicate
Mary Bennett
committedOct 13, 2023

Commits on Oct 4, 2023

Fix cv.shuffle.b.sci immediate operand
Mary Bennett
committedOct 4, 2023
Fixes to xcvbitmanip and xcvsimd
Mary Bennett
committedOct 4, 2023
CORE-V: Auto-generation for Post-Increment Load & Store Instructions

NandniJamnadas
authored and
Mary Bennett
committedOct 4, 2023

Commits on Oct 3, 2023

CORE-V: Support CORE-V fast interrupts

craigblackmore
authored and
Mary Bennett
committedOct 3, 2023
CV32E40Pv2 Immediate Branch Auto-Generation Support

NandniJamnadas
authored and
Mary Bennett
committedOct 3, 2023
CV32E40Pv2 CORE-V SIMD Extension Only

NandniJamnadas
authored and
Mary Bennett
committedOct 3, 2023
XCOREVBITMANIP builtins added
Mary Bennett
committedOct 3, 2023
CV32E40Pv2 Event Load Builtin

NandniJamnadas
authored and
Mary Bennett
committedOct 3, 2023

Commits on Sep 28, 2023

RISC-V: Add support for XCValu extension in CV32E40P

urekhun
authored and
Mary Bennett
committedSep 28, 2023
RISC-V: Add support for XCVmac extension in CV32E40P
Mary Bennett
committedSep 28, 2023
RISC-V: Support {U}INT64 to FP16 auto-vectorization
Incarnation-p-lee
committedSep 28, 2023
[RA]: Add flag for checking IRA in progress
vnmakarov
committedSep 28, 2023
target/111600 - avoid deep recursion in access diagnostics
rguenth
committedSep 28, 2023
libgfortran: Use __builtin_unreachable() not -Wno-stringop-overflow to silence warning
tob2
committedSep 28, 2023
vec.h: Make some ops work with non-trivially copy constructible and/or destructible types
jakubjelinek
committedSep 28, 2023
Remove some unused poly_int variables
rsandifo-arm
committedSep 28, 2023
Daily bump.
GCC Administrator
committedSep 28, 2023
tree-optimization/111614 - missing convert in undistribute_bitref_for_vector
rguenth
committedSep 28, 2023
Replace riscv_vector with riscv_v in target selector clauses.
amylaar
committedSep 28, 2023
RISC-V: Bugfix for RTL check[PR111533]
xuli
committedSep 28, 2023

Commits on Sep 27, 2023

libstdc++: Fix format string in StdChronoTimeZoneRulePrinter
jwakely
committedSep 27, 2023
OpenMP: GIMPLE_OMP_STRUCTURED_BLOCK bug fix
SandraLoosemore
committedSep 27, 2023
Darwin, configure: Allow for an unrecognisable dsymutil [PR111610].
iains
committedSep 27, 2023