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Being memory safe
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Being memory safe

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Starred repositories

11 results for forked starred repositories
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An example Hardware Processing Engine. A forked version to fix the interface definition that Verilator does not like to use.

SystemVerilog 1 1 Updated Mar 26, 2024

A heterogeneous accelerator-centric compute cluster

SystemVerilog 9 7 Updated Sep 12, 2024

IPs for data-plane integration of Hardware Processing Engines (HWPEs) within a PULP system

SystemVerilog 1 Updated Jul 20, 2023

Architecture for Minimum Energy DNNs at Edge and domain-specific processing(ArchiMEDES)

C 4 1 Updated Mar 27, 2024

A GPU acceleration flow for RTL simulation with batch stimulus

C++ 87 7 Updated Apr 1, 2024

https://caravel-user-project.readthedocs.io

Verilog 7 4 Updated Mar 29, 2022

The single instruction C compiler

C 9,357 396 Updated May 29, 2024

Python Verilog value change dump (VCD) parser library + the nifty vcdcat VCD command line pretty printer.

Python 55 21 Updated Aug 10, 2024

Arduino Library for FAT12/FAT16/FAT32

C++ 40 25 Updated Jul 25, 2024

Empowering everyone to build reliable and efficient software.

Rust 12 3 Updated Aug 18, 2024