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Starred repositories

3 stars written in Verilog
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PicoRV32 - A Size-Optimized RISC-V CPU

Verilog 3,135 755 Updated Jun 27, 2024

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Verilog 2,115 285 Updated Oct 11, 2024

Z80 open-source silicon clone. Goal is to become a silicon proven, pin compatible, open-source replacement for classic Z80.

Verilog 610 22 Updated Nov 8, 2024